Searched full:bar (Results 1 – 25 of 81) sorted by relevance
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/Documentation/devicetree/ |
D | overlay-notes.rst | 41 The overlay bar.dts, 44 ---- bar.dts - overlay target location by label ---------------------------- 48 /* bar peripheral */ 49 bar { 50 compatible = "corp,bar"; 54 ---- bar.dts --------------------------------------------------------------- 56 when loaded (and resolved as described in [1]) should result in foo+bar.dts:: 58 ---- foo+bar.dts ----------------------------------------------------------- 59 /* FOO platform + bar peripheral */ 72 /* bar peripheral */ [all …]
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/Documentation/powerpc/ |
D | pci_iov_resource_on_powernv.rst | 172 discover the BAR sizes and assign addresses for them. For VF devices, 173 software uses VF BAR registers in the *PF* SR-IOV Capability to 177 When a VF BAR in the PF SR-IOV Capability is programmed, it sets the 180 1MB VF BAR0, the address in that VF BAR sets the base of an 8MB region. 182 is a BAR0 for one of the VFs. Note that even though the VF BAR 195 the segment size matches the smallest VF BAR, which means larger VF 210 and different segment sizes. If we have VFs that each have a 1MB BAR 211 and a 32MB BAR, we could use one M64 window to assign 1MB segments and 215 more in the next two sections. For a given VF BAR, we need to 216 effectively reserve the entire 256 segments (256 * VF BAR size) and [all …]
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/Documentation/devicetree/bindings/i2c/ |
D | i2c-pxa-pci-ce4100.txt | 5 PCI device has three PCI-bars, each bar contains a complete I2C 10 Grant Likely recommended to use the ranges property to map the PCI-Bar 21 offset from be base of the BAR (which would be 23 the same BAR) 43 * three is the bar number followed by the 64bit bar address 44 * followed by size of the mapping. The bar address 58 * number of the bar
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/Documentation/admin-guide/ |
D | bootconfig.rst | 48 foo.bar.baz = value1 49 foo.bar.qux.quux = value2 53 foo.bar { 60 foo.bar { baz = value1; qux.quux = value2 } 71 foo = bar, baz 77 foo = bar, baz 87 foo = bar, baz 90 In this case, the key ``foo`` has ``bar``, ``baz`` and ``qux``. 96 foo.bar = value2 103 bar = value1 [all …]
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/Documentation/doc-guide/ |
D | kernel-doc.rst | 51 scripts/kernel-doc -v -none drivers/foo/bar.c 236 * @bar: non-anonymous union 237 * @bar.st1: struct st1 inside @bar 238 * @bar.st2: struct st2 inside @bar 239 * @bar.st1.memb1: first member of struct st1 on union bar 240 * @bar.st1.memb2: second member of struct st1 on union bar 241 * @bar.st2.memb1: first member of struct st2 on union bar 242 * @bar.st2.memb2: second member of struct st2 on union bar 265 } bar; 271 is named, the member ``bar`` inside it should be documented as [all …]
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/Documentation/translations/it_IT/doc-guide/ |
D | kernel-doc.rst | 80 scripts/kernel-doc -v -none drivers/foo/bar.c 267 * @bar: non-anonymous union 268 * @bar.st1: struct st1 inside @bar 269 * @bar.st2: struct st2 inside @bar 270 * @bar.st1.memb1: first member of struct st1 on union bar 271 * @bar.st1.memb2: second member of struct st1 on union bar 272 * @bar.st2.memb1: first member of struct st2 on union bar 273 * @bar.st2.memb2: second member of struct st2 on union bar 296 } bar; 302 di nome ``foo``, il suo campo ``bar`` dev'essere documentato [all …]
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/Documentation/misc-devices/ |
D | pci-endpoint-test.rst | 15 #) verifying addresses programmed in BAR 31 Tests the BAR. The number of the BAR to be tested
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D | spear-pcie-gadget.rst | 68 bar0 is SYSRAM1(E0800000). Always program bar size before bar 69 address. Kernel might modify bar size and address for alignment, 70 so read back bar size and address after writing to cross check.
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/Documentation/ABI/testing/ |
D | debugfs-driver-habanalabs | 6 PCI bar, or the device VA of a host mapped memory to be read or 60 device's PCI bar. Writing to this file generates a write 63 the generic Linux user-space PCI mapping) because the DDR bar 65 move the bar before and after the transaction. 75 through the device's PCI bar. Writing to this file generates a 78 the generic Linux user-space PCI mapping) because the DDR bar 80 move the bar before and after the transaction.
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/Documentation/devicetree/bindings/pci/ |
D | cdns-pcie-host.yaml | 25 cdns,no-bar-match-nbits: 27 Set into the no BAR match register to configure the number of least
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/Documentation/devicetree/bindings/clock/ |
D | maxim,max77686.txt | 62 compatible = "bar,foo"; 87 compatible = "bar,foo"; 110 compatible = "bar,foo";
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D | maxim,max9485.txt | 55 compatible = "bar,foo";
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/Documentation/kbuild/ |
D | modules.rst | 152 Example (The module foo.ko, consist of bar.o and baz.o):: 154 make -C $KDIR M=$PWD bar.lst 314 and bar.ko, the kbuild lines would be:: 316 obj-m := foo.o bar.o 318 bar-y := <bar_srcs> 527 If you have two modules, foo.ko and bar.ko, where 528 foo.ko needs symbols from bar.ko, you can use a 534 ./bar/ <= contains bar.ko 539 obj-m := foo/ bar/
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D | kconfig-language.rst | 124 bool "foo" if BAR 125 default y if BAR 129 depends on BAR 147 if FOO depends on BAR that is not set. 167 depends on BAR 172 FOO BAR BAZ's default choice for BAZ 187 Note: If the combination of FOO=y and BAR=m causes a link error, 198 FOO should imply not only BAZ, but also its dependency BAR:: 202 imply BAR 474 This sets the config program's title bar if the config program chooses [all …]
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/Documentation/filesystems/ |
D | befs.rst | 56 Assuming that your kernel source is in /foo/bar/linux and the patchfile 59 cd /foo/bar/linux 74 cd /foo/bar/linux
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/Documentation/PCI/endpoint/ |
D | pci-endpoint.rst | 49 * set_bar: ops to configure the BAR 50 * clear_bar: ops to reset the BAR 102 the BAR. 188 The PCI Function driver can allocate space for a particular BAR using
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/Documentation/driver-api/ |
D | men-chameleon-bus.rst | 66 header lists the device id, PCI BAR, offset from the beginning of the PCI 67 BAR, size in the FPGA, interrupt number and some other properties currently 136 .name = "foo-bar",
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/Documentation/driver-api/pci/ |
D | p2pdma.rst | 60 functionality. For example, if a specific RNIC added a BAR with some 69 A provider simply needs to register a BAR (or a portion of a BAR)
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/Documentation/devicetree/bindings/iio/gyroscope/ |
D | invensense,mpu3050.txt | 30 vdd-supply = <&bar>;
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/Documentation/devicetree/bindings/gpio/ |
D | gpio.txt | 220 line-name = "foo-bar-gpio"; 262 gpio-ranges = <&foo 0 20 10>, <&bar 10 50 20>; 266 - pins 50..69 on pin controller "bar" is mapped to GPIO line 10..29 318 "bar"; 324 in pinctrl2 are defined using the pin groups named "foo" and "bar".
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/Documentation/networking/ |
D | 6lowpan.rst | 43 lowpan_foobar_priv(dev)->bar = foo;
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/Documentation/devicetree/bindings/iio/pressure/ |
D | bmp085.yaml | 71 vdda-supply = <&bar>;
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/Documentation/devicetree/bindings/arm/omap/ |
D | crossbar.txt | 19 so crossbar bar driver should not consider them as free
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/Documentation/devicetree/bindings/clock/st/ |
D | st,flexgen.txt | 5 - a clock cross bar (represented by a mux element) 34 | | | | | | Bar |====>| |====>| |===|=========>
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/Documentation/trace/ |
D | ftrace-design.rst | 65 For example, if the function foo() calls bar(), when the bar() function calls 68 - "frompc" - the address bar() will use to return to foo() 69 - "selfpc" - the address bar() (with mcount() size adjustment)
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