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Searched +full:cpb +full:- +full:mcasp +full:- +full:auxclk +full:- +full:44100 (Results 1 – 2 of 2) sorted by relevance

/Documentation/devicetree/bindings/sound/
Dti,j721e-cpb-ivi-audio.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/ti,j721e-cpb-ivi-audio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Peter Ujfalusi <peter.ujfalusi@ti.com>
14 extension board is extending the CPB audio support, decribed in:
15 sound/ti,j721e-cpb-audio.txt
23 44.1KHz). The same PLLs are used for McASP0's AUXCLK clock via different
26 Note: the same PLL4 and PLL15 is used by the audio support on the CPB!
29 PLL4 ---> PLL4_HSDIV0 ---> MCASP10_AUXCLK ---> McASP10.auxclk
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Dti,j721e-cpb-audio.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/ti,j721e-cpb-audio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Peter Ujfalusi <peter.ujfalusi@ti.com>
18 PLL15 (for 44.1KHz). The same PLLs are used for McASP10's AUXCLK clock via
23 PLL4 ---> PLL4_HSDIV0 ---> MCASP10_AUXCLK ---> McASP10.auxclk
24 |-> PLL4_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI
27 PLL15 ---> PLL15_HSDIV0 ---> MCASP10_AUXCLK ---> McASP10.auxclk
28 |-> PLL15_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI
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