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/Documentation/admin-guide/media/
Ddvb-usb-dib0700-cardlist.rst29 * - DiBcom NIM7090 reference design
31 * - DiBcom NIM8096MD reference design
33 * - DiBcom NIM9090MD reference design
35 * - DiBcom STK7070P reference design
37 * - DiBcom STK7070PD reference design
39 * - DiBcom STK7700D reference design
41 * - DiBcom STK7700P reference design
43 * - DiBcom STK7770P reference design
45 * - DiBcom STK807xP reference design
47 * - DiBcom STK807xPVR reference design
[all …]
Ddvb-usb-rtl28xxu-cardlist.rst55 * - Realtek RTL2831U reference design
57 * - Realtek RTL2832U reference design
Ddvb-usb-zd1301-cardlist.rst15 * - ZyDAS ZD1301 reference design
/Documentation/locking/
Dindex.rst11 lockdep-design
14 mutex-design
15 rt-mutex-design
19 ww-mutex-design
/Documentation/RCU/
Dindex.rst28 Design/Memory-Ordering/Tree-RCU-Memory-Ordering
29 Design/Expedited-Grace-Periods/Expedited-Grace-Periods
30 Design/Requirements/Requirements
31 Design/Data-Structures/Data-Structures
/Documentation/devicetree/bindings/power/supply/
Dbq27xxx.yaml64 - energy-full-design-microwatt-hours
65 - charge-full-design-microamp-hours
66 - voltage-min-design-microvolt
67 Both or neither of the *-full-design-*-hours properties must be set.
84 voltage-min-design-microvolt = <3200000>;
85 energy-full-design-microwatt-hours = <5290000>;
86 charge-full-design-microamp-hours = <1430000>;
Dbattery.yaml40 voltage-min-design-microvolt:
43 voltage-max-design-microvolt:
46 energy-full-design-microwatt-hours:
47 description: battery design energy
49 charge-full-design-microamp-hours:
50 description: battery design capacity
136 voltage-min-design-microvolt = <3200000>;
137 voltage-max-design-microvolt = <4200000>;
138 energy-full-design-microwatt-hours = <5290000>;
139 charge-full-design-microamp-hours = <1430000>;
Dingenic,battery.yaml35 - voltage-min-design-microvolt: drained battery voltage,
36 - voltage-max-design-microvolt: fully charged battery voltage.
52 voltage-min-design-microvolt = <3600000>;
53 voltage-max-design-microvolt = <4200000>;
/Documentation/trace/
Dindex.rst8 ftrace-design
23 histogram-design
27 ring-buffer-design
/Documentation/networking/devlink/
Dnfp.rst35 - Part number identifying the board design
38 - Revision of the board design
41 - Vendor of the board design
44 - Model name of the board design
Dbnxt.rst56 - Part number identifying the board design
59 - ASIC design identifier
62 - ASIC design revision
Ddevlink-info.rst57 Versions in this section identify the device design. For example,
127 Unique identifier of the board design.
132 Board design revision.
137 ASIC design identifier.
142 ASIC design revision/stepping.
Ddevlink-flash.rst74 design, e.g. for looking up applicable firmware updates. This is why
76 is fixed) - ``fixed`` versions should identify the design, not a single
88 # Get unique HW design identifier
/Documentation/power/regulator/
Ddesign.rst2 Regulator API design notes
6 of the design considerations which impact the regulator API design.
/Documentation/driver-api/driver-model/
Ddesign-patterns.rst2 Device Driver Design Patterns
5 This document describes a few common design patterns found in device drivers.
7 conform to these design patterns.
21 The most common way to achieve this is to use the state container design
102 The design pattern is the same for an hrtimer or something similar that will
Dindex.rst11 design-patterns
/Documentation/scheduler/
Dindex.rst13 sched-design-CFS
17 sched-nice-design
/Documentation/arm/
Dixp4xx.rst21 http://developer.intel.com/design/network/products/npfamily/ixp4xx.htm
48 http://developer.intel.com/design/network/products/npfamily/ixp425.htm
106 The ADI Coyote platform is reference design for those building
122 http://www.intel.com/design/network/products/npfamily/ixdpg425.htm
129 http://www.intel.com/design/network/products/npfamily/ixdp465.htm
/Documentation/devicetree/bindings/sound/
Dfsl,ssi.txt58 design. See the notes below.
62 by SOC design. See the notes below.
79 purpose of these two properties is to represent this hardware design.
/Documentation/userspace-api/
Dunshare.rst6 be used, its interface specification, design, implementation and
20 6) High Level Design
21 7) Low Level Design
101 extensively in the beginning. However, with proper design and code
119 If and when new context flags are added, unshare() design should allow
184 6) High Level Design
231 7) Low Level Design
/Documentation/filesystems/
Dinotify.rst18 What is the design decision behind not tying the watch to the open fd of
29 What is the design decision behind using an-fd-per-instance as opposed to
38 spaces is thus sensible. The current design is what user-space developers
/Documentation/devicetree/bindings/spi/
Dnvidia,tegra114-spi.txt30 Tap values vary based on the platform design trace lengths from Tegra SPI
35 Tap values vary based on the platform design trace lengths from Tegra SPI
/Documentation/target/
Dindex.rst10 tcmu-design
/Documentation/devicetree/bindings/mfd/
Dqriox.txt4 the kmp204x design.
/Documentation/devicetree/bindings/display/bridge/
Dmegachips-stdpxxxx-ge-b850v3-fw.txt10 design. The result is that, in this design, neither the STDP4028 nor the

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