Searched full:design (Results 1 – 25 of 288) sorted by relevance
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/Documentation/admin-guide/media/ |
D | dvb-usb-dib0700-cardlist.rst | 29 * - DiBcom NIM7090 reference design 31 * - DiBcom NIM8096MD reference design 33 * - DiBcom NIM9090MD reference design 35 * - DiBcom STK7070P reference design 37 * - DiBcom STK7070PD reference design 39 * - DiBcom STK7700D reference design 41 * - DiBcom STK7700P reference design 43 * - DiBcom STK7770P reference design 45 * - DiBcom STK807xP reference design 47 * - DiBcom STK807xPVR reference design [all …]
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D | dvb-usb-rtl28xxu-cardlist.rst | 55 * - Realtek RTL2831U reference design 57 * - Realtek RTL2832U reference design
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D | dvb-usb-zd1301-cardlist.rst | 15 * - ZyDAS ZD1301 reference design
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/Documentation/locking/ |
D | index.rst | 11 lockdep-design 14 mutex-design 15 rt-mutex-design 19 ww-mutex-design
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/Documentation/RCU/ |
D | index.rst | 28 Design/Memory-Ordering/Tree-RCU-Memory-Ordering 29 Design/Expedited-Grace-Periods/Expedited-Grace-Periods 30 Design/Requirements/Requirements 31 Design/Data-Structures/Data-Structures
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/Documentation/devicetree/bindings/power/supply/ |
D | bq27xxx.yaml | 64 - energy-full-design-microwatt-hours 65 - charge-full-design-microamp-hours 66 - voltage-min-design-microvolt 67 Both or neither of the *-full-design-*-hours properties must be set. 84 voltage-min-design-microvolt = <3200000>; 85 energy-full-design-microwatt-hours = <5290000>; 86 charge-full-design-microamp-hours = <1430000>;
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D | battery.yaml | 40 voltage-min-design-microvolt: 43 voltage-max-design-microvolt: 46 energy-full-design-microwatt-hours: 47 description: battery design energy 49 charge-full-design-microamp-hours: 50 description: battery design capacity 136 voltage-min-design-microvolt = <3200000>; 137 voltage-max-design-microvolt = <4200000>; 138 energy-full-design-microwatt-hours = <5290000>; 139 charge-full-design-microamp-hours = <1430000>;
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D | ingenic,battery.yaml | 35 - voltage-min-design-microvolt: drained battery voltage, 36 - voltage-max-design-microvolt: fully charged battery voltage. 52 voltage-min-design-microvolt = <3600000>; 53 voltage-max-design-microvolt = <4200000>;
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/Documentation/trace/ |
D | index.rst | 8 ftrace-design 23 histogram-design 27 ring-buffer-design
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/Documentation/networking/devlink/ |
D | nfp.rst | 35 - Part number identifying the board design 38 - Revision of the board design 41 - Vendor of the board design 44 - Model name of the board design
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D | bnxt.rst | 56 - Part number identifying the board design 59 - ASIC design identifier 62 - ASIC design revision
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D | devlink-info.rst | 57 Versions in this section identify the device design. For example, 127 Unique identifier of the board design. 132 Board design revision. 137 ASIC design identifier. 142 ASIC design revision/stepping.
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D | devlink-flash.rst | 74 design, e.g. for looking up applicable firmware updates. This is why 76 is fixed) - ``fixed`` versions should identify the design, not a single 88 # Get unique HW design identifier
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/Documentation/power/regulator/ |
D | design.rst | 2 Regulator API design notes 6 of the design considerations which impact the regulator API design.
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/Documentation/driver-api/driver-model/ |
D | design-patterns.rst | 2 Device Driver Design Patterns 5 This document describes a few common design patterns found in device drivers. 7 conform to these design patterns. 21 The most common way to achieve this is to use the state container design 102 The design pattern is the same for an hrtimer or something similar that will
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D | index.rst | 11 design-patterns
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/Documentation/scheduler/ |
D | index.rst | 13 sched-design-CFS 17 sched-nice-design
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/Documentation/arm/ |
D | ixp4xx.rst | 21 http://developer.intel.com/design/network/products/npfamily/ixp4xx.htm 48 http://developer.intel.com/design/network/products/npfamily/ixp425.htm 106 The ADI Coyote platform is reference design for those building 122 http://www.intel.com/design/network/products/npfamily/ixdpg425.htm 129 http://www.intel.com/design/network/products/npfamily/ixdp465.htm
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/Documentation/devicetree/bindings/sound/ |
D | fsl,ssi.txt | 58 design. See the notes below. 62 by SOC design. See the notes below. 79 purpose of these two properties is to represent this hardware design.
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/Documentation/userspace-api/ |
D | unshare.rst | 6 be used, its interface specification, design, implementation and 20 6) High Level Design 21 7) Low Level Design 101 extensively in the beginning. However, with proper design and code 119 If and when new context flags are added, unshare() design should allow 184 6) High Level Design 231 7) Low Level Design
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/Documentation/filesystems/ |
D | inotify.rst | 18 What is the design decision behind not tying the watch to the open fd of 29 What is the design decision behind using an-fd-per-instance as opposed to 38 spaces is thus sensible. The current design is what user-space developers
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/Documentation/devicetree/bindings/spi/ |
D | nvidia,tegra114-spi.txt | 30 Tap values vary based on the platform design trace lengths from Tegra SPI 35 Tap values vary based on the platform design trace lengths from Tegra SPI
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/Documentation/target/ |
D | index.rst | 10 tcmu-design
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/Documentation/devicetree/bindings/mfd/ |
D | qriox.txt | 4 the kmp204x design.
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/Documentation/devicetree/bindings/display/bridge/ |
D | megachips-stdpxxxx-ge-b850v3-fw.txt | 10 design. The result is that, in this design, neither the STDP4028 nor the
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