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/Documentation/devicetree/bindings/dma/
Drenesas,usb-dmac.yaml4 $id: http://devicetree.org/schemas/dma/renesas,usb-dmac.yaml#
19 - renesas,r8a7742-usb-dmac # RZ/G1H
20 - renesas,r8a7743-usb-dmac # RZ/G1M
21 - renesas,r8a7744-usb-dmac # RZ/G1N
22 - renesas,r8a7745-usb-dmac # RZ/G1E
23 - renesas,r8a77470-usb-dmac # RZ/G1C
24 - renesas,r8a774a1-usb-dmac # RZ/G2M
25 - renesas,r8a774b1-usb-dmac # RZ/G2N
26 - renesas,r8a774c0-usb-dmac # RZ/G2E
27 - renesas,r8a774e1-usb-dmac # RZ/G2H
[all …]
Drenesas,rcar-dmac.yaml4 $id: http://devicetree.org/schemas/dma/renesas,rcar-dmac.yaml#
19 - renesas,dmac-r8a7742 # RZ/G1H
20 - renesas,dmac-r8a7743 # RZ/G1M
21 - renesas,dmac-r8a7744 # RZ/G1N
22 - renesas,dmac-r8a7745 # RZ/G1E
23 - renesas,dmac-r8a77470 # RZ/G1C
24 - renesas,dmac-r8a774a1 # RZ/G2M
25 - renesas,dmac-r8a774b1 # RZ/G2N
26 - renesas,dmac-r8a774c0 # RZ/G2E
27 - renesas,dmac-r8a774e1 # RZ/G2H
[all …]
Drenesas,shdma.txt7 DMAC instances have the same number of channels and use the same DMA
9 multiplexer node. Even if there is only one such DMAC instance on a system, it
27 "renesas,shdma-r8a73a4" for the system DMAC on r8a73a4 SoC
30 dmac: dma-multiplexer@0 {
82 dmas = <&dmac 0xd1
83 &dmac 0xd2>;
Dsirfsoc-dma.txt6 - compatible: Should be "sirf,prima2-dmac", "sirf,atlas7-dmac" or
7 "sirf,atlas7-dmac-v2"
18 compatible = "sirf,prima2-dmac";
Dsnps,dw-axi-dmac.txt5 - reg: Address range of the DMAC registers. This should include
7 - interrupt: Should contain the DMAC interrupt number.
21 supported by DMAC is used. [1:256]
25 dmac: dma-controller@80000 {
Dsocionext,uniphier-mio-dmac.yaml4 $id: http://devicetree.org/schemas/dma/socionext,uniphier-mio-dmac.yaml#
21 const: socionext,uniphier-mio-dmac
55 dmac: dma-controller@5a000000 {
56 compatible = "socionext,uniphier-mio-dmac";
Dste-coh901318.txt16 dmac: dma-controller@c00020000 {
30 dmas = <&dmac 17 &dmac 18>;
Dadi,axi-dmac.txt1 Analog Devices AXI-DMAC DMA controller
4 - compatible: Must be "adi,axi-dmac-1.00.a".
36 DMA clients connected to the AXI-DMAC DMA controller must use the format
43 compatible = "adi,axi-dmac-1.00.a";
Dlpc1850-dmamux.txt19 dmac: dma@40002000 {
41 dma-masters = <&dmac>;
Darm-pl330.txt16 - dma-channels: contains the total number of DMA channels supported by the DMAC
17 - dma-requests: contains the total number of DMA requests supported by the DMAC
Darm-pl08x.txt24 - dma-channels: contains the total number of DMA channels supported by the DMAC
25 - dma-requests: contains the total number of DMA requests supported by the DMAC
Dste-dma40.txt5 - reg: Address range of the DMAC registers
7 - interrupt: Should contain the DMAC interrupt number
/Documentation/devicetree/bindings/mtd/
Dflctl-nand.txt31 dmas = <&dmac 1 /* data_tx */
32 &dmac 2;> /* data_rx */
/Documentation/devicetree/bindings/sound/
Dingenic,aic.yaml90 dmas = <&dmac 25 0xffffffff>, <&dmac 24 0xffffffff>;
Drenesas,rsnd.txt289 SRU/ADG/SSIU/SSI/AUDIO-DMAC-periperi if generation2/generation3
290 Select extended AUDIO-DMAC-periperi address if SoC has it,
291 otherwise select normal AUDIO-DMAC-periperi address.
338 - dma : Should contain Audio DMAC entry
344 - dma : Should contain Audio DMAC entry
348 - dma : Should contain Audio DMAC entry
352 - dma : Should contain Audio DMAC entry
371 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
/Documentation/bpf/
Dprog_flow_dissector.rst45 | DMAC | SMAC | ETHER_TYPE | L3_HEADER |
63 | DMAC | SMAC | TPID | TCI |ETHER_TYPE | L3_HEADER |
82 | DMAC | SMAC | TPID | TCI |ETHER_TYPE | L3_HEADER |
/Documentation/networking/devlink/
Dsja1105.rst45 only DMAC as key).
/Documentation/devicetree/bindings/reset/
Dzynq-reset.txt28 96 : dmac reset
/Documentation/devicetree/bindings/bus/
Dbaikal,bt1-apb.yaml14 Baikal-T1 CPU or DMAC MMIO requests are handled by the AMBA 3 AXI Interconnect
/Documentation/devicetree/bindings/mmc/
Dsocionext,uniphier-sd.yaml95 dmas = <&dmac 4>;
/Documentation/devicetree/bindings/clock/
Drenesas,cpg-mstp-clocks.yaml81 "dmac";
Dbrcm,kona-ccu.txt85 master dmac peri 4 BCM281XX_MASTER_CCU_DMAC
/Documentation/devicetree/bindings/mfd/
Dsamsung,exynos5433-lpass.txt18 UART, SLIMBUS, PCM, I2S, DMAC, Timers 0...4, VIC, WDT 0...1 devices.
/Documentation/devicetree/bindings/net/
Drenesas,ether.yaml44 - description: E-DMAC/feLic registers
/Documentation/driver-api/mmc/
Dmmc-async-req.rst89 /* flush pending desc to the DMAC (dmaengine.h) */

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