Searched full:exposed (Results 1 – 25 of 173) sorted by relevance
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| /Documentation/admin-guide/perf/ |
| D | qcom_l3_pmu.rst | 7 by all cores within a socket. Each slice is exposed as a separate uncore perf
18 exposed via the "event" format attribute. In addition to the 32bit physical
20 counter chaining. This feature is exposed via the "lc" (long counter) format
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| /Documentation/admin-guide/gpio/ |
| D | gpio-mockup.rst | 7 chips for testing purposes. The lines exposed by these chips can be accessed
21 of lines exposed by the chip. If the base GPIO is -1, the gpiolib
33 GPIO lines exposed by it should be named.
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| /Documentation/ABI/testing/ |
| D | sysfs-bus-iio-cros-ec | 25 This attribute is exposed by the CrOS EC sensors driver and
26 represents the sensor ID as exposed by the EC. This ID is used
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| D | sysfs-bus-iio-adc-max9611 | 15 These attributes describe a single physical component, exposed as two distinct
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| D | sysfs-kernel-iommu_groups | 33 it is now exposed as "direct-relaxable" instead of "direct".
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| /Documentation/sound/hd-audio/ |
| D | realtek-pc-beep.rst | 7 route audio between pins but aren't themselves exposed as HDA widgets. As far
35 by h and S bits. Does not affect the level of 1Ah exposed to other widgets.
39 by h and S bits. Does not affect the level of 1Ah exposed to other widgets.
86 This particular register, exposed at coefficient 0x36 and named in commits from
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| /Documentation/devicetree/bindings/mfd/ |
| D | aspeed-lpc.txt | 26 * An LPC Host Interface Controller: Manages functions exposed to the host such
35 configuration, therefore the host portion of the controller is exposed as a
122 The LPC Host Interface Controller manages functions exposed to the host such as
144 be exposed over the LPC to AHB mapping
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| D | xylon,logicvc.yaml | 15 As a result, a multi-function device is exposed as parent of the display
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| /Documentation/arm64/ |
| D | pointer-authentication.rst | 77 The regset is exposed only when HWCAP_PACA is set. Separate masks are
78 exposed for data pointers and instruction pointers, as the set of PAC
130 exposed outside of the function, while still allowing binaries conforming to
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| /Documentation/devicetree/bindings/reserved-memory/ |
| D | xen,shared-memory.txt | 8 For each of these pre-shared memory regions, a range is exposed under
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| /Documentation/devicetree/bindings/thermal/ |
| D | nvidia,tegra186-bpmp-thermal.txt | 6 exposed by BPMP.
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| /Documentation/userspace-api/media/v4l/ |
| D | vidioc-g-jpegcomp.rst | 70 control is exposed by a driver applications should use it instead
91 control is exposed by a driver applications should use it instead
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| /Documentation/virt/kvm/devices/ |
| D | xive.rst | 22 are required for interrupt management. These are exposed to the
36 They are exposed to software in four different pages each proposing
39 third (operating system) and the fourth (user level) are exposed the
53 pages exposed to the guest should accommadate this change.
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| /Documentation/devicetree/bindings/input/touchscreen/ |
| D | resistive-adc-touch.txt | 10 These should correspond to the channels exposed by the ADC device and should
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| /Documentation/scsi/ |
| D | ufs.rst | 88 * UDM_SAP: Device manager service access point is exposed to device
91 * UTP_CMD_SAP: Command service access point is exposed to UFS command
93 * UTP_TM_SAP: Task management service access point is exposed to task
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| /Documentation/fpga/ |
| D | dfl.rst | 85 The following functions are exposed through ioctls:
95 More functions are exposed through sysfs
124 performance counters are exposed through perf PMU APIs. Standard perf tool
145 The following functions are exposed through ioctls:
167 More functions are exposed through sysfs:
219 Users can read related information via sysfs interfaces exposed
248 the compat_id exposed by the target FPGA region. This check is usually done by
258 Features supported by the particular FPGA device are exposed through Device
284 Ports (and related AFUs) are accessed via PF by default, but could be exposed
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| /Documentation/devicetree/bindings/clock/ |
| D | ti,sci-clk.txt | 17 exposed by the PM firmware. The list of valid values for the device IDs
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| D | nvidia,tegra210-car.txt | 15 In clock consumers, this cell represents the clock ID exposed by the
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| D | nvidia,tegra30-car.txt | 15 In clock consumers, this cell represents the clock ID exposed by the
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| D | nvidia,tegra20-car.txt | 15 In clock consumers, this cell represents the clock ID exposed by the
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| D | nvidia,tegra114-car.txt | 15 In clock consumers, this cell represents the clock ID exposed by the
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| /Documentation/driver-api/mmc/ |
| D | mmc-dev-parts.rst | 8 As of this writing, MMC boot partitions as supported and exposed as
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| /Documentation/block/ |
| D | null_blk.rst | 119 0 Block device is exposed as a random-access block device.
120 1 Block device is exposed as a host-managed zoned block device. Requires
125 Per zone size when exposed as a zoned block device. Must be a power of two.
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| /Documentation/driver-api/ |
| D | miscellaneous.rst | 37 A chip exposes one or more PWM signal sources, each of which exposed as
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| /Documentation/virt/kvm/ |
| D | review-checklist.rst | 21 6. New cpu features should be exposed via KVM_GET_SUPPORTED_CPUID2
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