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/Documentation/hwmon/
Dina2xx.rst10 Addresses: I2C 0x40 - 0x4f
20 Addresses: I2C 0x40 - 0x4f
30 Addresses: I2C 0x40 - 0x4f
40 Addresses: I2C 0x40 - 0x4f
50 Addresses: I2C 0x40 - 0x4f
59 -----------
61 The INA219 is a high-side current shunt and power monitor with an I2C
65 The INA220 is a high or low side current shunt and power monitor with an I2C
71 INA230 and INA231 are high or low side current shunt and power monitors
75 The shunt value in micro-ohms can be set via platform data or device tree at
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Dmax16065.rst11 Addresses scanned: -
15 http://datasheets.maxim-ic.com/en/ds/MAX16065-MAX16066.pdf
21 Addresses scanned: -
25 http://datasheets.maxim-ic.com/en/ds/MAX16067.pdf
31 Addresses scanned: -
35 http://datasheets.maxim-ic.com/en/ds/MAX16068.pdf
41 Addresses scanned: -
45 http://datasheets.maxim-ic.com/en/ds/MAX16070-MAX16071.pdf
47 Author: Guenter Roeck <linux@roeck-us.net>
51 -----------
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Dina3221.rst10 Addresses: I2C 0x40 - 0x43
19 -----------
21 The Texas Instruments INA3221 monitors voltage, current, and power on the high
22 side of up to three D.C. power supplies. The INA3221 monitors both shunt drop
24 and power are calculated host-side from these.
27 -------------
68 * BC: bus-voltage conversion time in millisecond
69 * SC: shunt-voltage conversion time in millisecond
71 Affects both Bus- and Shunt-voltage conversion time.
/Documentation/admin-guide/media/
Dsi476x.rst1 .. SPDX-License-Identifier: GPL-2.0
12 -------------------
14 - According to the SiLabs' datasheet it is possible to update the
15 firmware of the radio chip in the run-time, thus bringing it to the
23 -------------------------------
31 * /sys/kernel/debug/<device-name>/acf
52 0x05 smute 0 - Audio is not soft muted
53 1 - Audio is soft muted
60 0x10 pilot 0 - Stereo pilot is not present
61 1 - Stereo pilot is present
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/Documentation/ABI/stable/
Dsysfs-driver-aspeed-vuart1 What: /sys/bus/platform/drivers/aspeed-vuart/*/lpc_address
4 Description: Configures which IO port the host side of the UART
5 will appear on the host <-> BMC LPC bus.
9 What: /sys/bus/platform/drivers/aspeed-vuart/*/sirq
12 Description: Configures which interrupt number the host side of
13 the UART will appear on the host <-> BMC LPC bus.
17 What: /sys/bus/platform/drivers/aspeed-vuart/*/sirq_polarity
22 Set to 0 for active-low or 1 for active-high.
/Documentation/virt/
Dguest-halt-polling.rst9 This provides the following benefits to host side polling:
15 2) The VM-exit cost can be avoided.
17 The downside of guest side polling is that polling is performed
25 ("per-cpu guest_halt_poll_ns"), which is adjusted by the algorithm
42 Division factor used to shrink per-cpu guest_halt_poll_ns when
49 Multiplication factor used to grow per-cpu guest_halt_poll_ns
50 when event occurs after per-cpu guest_halt_poll_ns
57 The per-cpu guest_halt_poll_ns eventually reaches zero
59 per-cpu guest_halt_poll_ns when growing. This can
70 to avoid it (per-cpu guest_halt_poll_ns will remain
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/Documentation/driver-api/
Di2c.rst5 the "Inter-IC" bus, a simple bus protocol which is widely used where low
7 some vendors use another name (such as "Two-Wire Interface", TWI) for
11 there's a high speed extension (3.4 MHz) that's not yet found wide use.
12 I2C is a multi-master bus; open drain signaling is used to arbitrate
16 The Linux I2C programming interfaces support the master side of bus
17 interactions and the slave side. The programming interface is
38 .. kernel-doc:: include/linux/i2c.h
41 .. kernel-doc:: drivers/i2c/i2c-boardinfo.c
44 .. kernel-doc:: drivers/i2c/i2c-core-base.c
47 .. kernel-doc:: drivers/i2c/i2c-core-smbus.c
/Documentation/devicetree/bindings/arm/
Datmel-sysregs.txt4 - compatible: Should be "atmel,sama5d2-chipid"
5 - reg : Should contain registers location and length
8 - compatible: Should be "atmel,at91sam9260-pit"
9 - reg: Should contain registers location and length
10 - interrupts: Should contain interrupt for the PIT which is the IRQ line
14 - compatible: Should be "microchip,sam9x60-pit64b"
15 - reg: Should contain registers location and length
16 - interrupts: Should contain interrupt for PIT64B timer
17 - clocks: Should contain the available clock sources for PIT64B timer.
20 - compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd"
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/Documentation/userspace-api/media/drivers/
Dmax2175.rst1 .. SPDX-License-Identifier: GPL-2.0
6 The MAX2175 driver implements the following driver-specific controls:
9 -------------------------------
12 Refer to Documentation/driver-api/media/v4l2-controls.rst for more details.
14 .. flat-table::
15 :header-rows: 0
16 :stub-columns: 0
19 * - ``(0)``
20 - I2S output is disabled.
21 * - ``(1)``
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/Documentation/devicetree/bindings/iio/adc/
Dmaxim,max9611.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jacopo Mondi <jacopo@jmondi.org>
13 These devices combine a high-side current sense amplifier with a 12 bit ADC.
19 - maxim,max9611
20 - maxim,max9612
25 shunt-resistor-micro-ohms:
29 RS- inputs, across which the current is measured. Value needed to compute
35 - compatible
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/Documentation/userspace-api/media/v4l/
Dstreaming-par.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
4 .. _streaming-par:
11 as well as I/O. Presently applications can request a high quality
17 side. This is especially useful when using the
Ddev-touch.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
10 ``/dev/v4l-touch0`` to ``/dev/v4l-touch255`` with major number 81 and
20 side-channel for diagnostics or tuning. In other systems, the ASIC is a simple
21 analogue front end device which delivers touch data at high rate, and any touch
31 a no-touch reference (or "baseline") measurement:
33 Delta = Raw - Reference
51 :ref:`Touch Formats <tch-formats>`.
/Documentation/driver-api/usb/
Dgadget.rst11 This document presents a Linux-USB "Gadget" kernel mode API, for use
17 - Supports USB 2.0, for high speed devices which can stream data at
20 - Handles devices with dozens of endpoints just as well as ones with
21 just two fixed-function ones. Gadget drivers can be written so
24 - Flexible enough to expose more complex USB device capabilities such
28 - USB "On-The-Go" (OTG) support, in conjunction with updates to the
29 Linux-USB host side.
31 - Sharing data structures and API models with the Linux-USB host side
32 API. This helps the OTG support, and looks forward to more-symmetric
34 side drivers).
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/Documentation/sound/designs/
Dchannel-mapping-api.rst2 ALSA PCM channel-mapping API
38 the kernel/user-space ABI perspective. It uses only the existing
57 ---
61 ``type data-bytes ch0 ch1 ch2...``
71 type is where pair-wise channels are swappable. For example, when you
88 /* this follows the alsa-lib mixer channel value + 3 */
95 SNDRV_CHMAP_SL, /* side left */
96 SNDRV_CHMAP_SR, /* side right */
105 SNDRV_CHMAP_FLH, /* front left high */
106 SNDRV_CHMAP_FCH, /* front center high */
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/Documentation/networking/device_drivers/ethernet/microsoft/
Dnetvsc.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Hyper-V network driver
17 ----------------
19 Hyper-V host version does. Windows Server 2016 and Azure
23 Receive Side Scaling
24 --------------------
25 Hyper-V supports receive side scaling. For TCP & UDP, packets can
34 On Azure, fragmented UDP packets have high loss rate with L4
41 ethtool -N eth0 rx-flow-hash udp4 sdfn
45 ethtool -N eth0 rx-flow-hash udp4 sd
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/Documentation/RCU/Design/Requirements/
DRequirements.rst16 ------------
18 Read-copy update (RCU) is a synchronization mechanism that is often used
19 as a replacement for reader-writer locking. RCU is unusual in that
20 updaters do not block readers, which means that RCU's read-side
28 thought of as an informal, high-level specification for RCU. It is
40 #. `Fundamental Non-Requirements`_
42 #. `Quality-of-Implementation Requirements`_
44 #. `Software-Engineering Requirements`_
53 ------------------------
58 #. `Grace-Period Guarantee`_
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/Documentation/devicetree/bindings/leds/
Dleds-lm3532.txt1 * Texas Instruments - lm3532 White LED driver with ambient light sensing
4 The LM3532 provides the 3 high-voltage, low-side current sinks. The device is
5 programmable over an I2C-compatible interface and has independent
11 each with 32 internal voltage setting resistors, 8-bit logarithmic and linear
16 - compatible : "ti,lm3532"
17 - reg : I2C slave address
18 - #address-cells : 1
19 - #size-cells : 0
22 - enable-gpios : gpio pin to enable (active high)/disable the device.
23 - ramp-up-us - The Run time ramp rates/step are from one current
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/Documentation/leds/
Dleds-lm3556.rst6 1.5 A Synchronous Boost LED Flash Driver w/ High-Side Current Source
10 - Daniel Jeong
12 Contact:Daniel Jeong(daniel.jeong-at-ti.com, gshark.jeong-at-gmail.com)
15 -----------
24 or by pulling the STROBE pin HIGH.
78 and 4 patterns are pre-defined in indicator_pattern array.
80 According to N-lank, Pulse time and N Period values, different pattern wiill
84 Please refer datasheet for more detail about N-Blank, Pulse time and N Period.
118 -----
121 according to include/linux/platform_data/leds-lm3556.h, set the i2c board info
/Documentation/devicetree/bindings/media/
Dvideo-interfaces.txt4 ---------------
21 #address-cells = <1>;
22 #size-cells = <0>;
37 a common scheme using '#address-cells', '#size-cells' and 'reg' properties is
41 specify #address-cells, #size-cells properties independently for the 'port'
44 Two 'endpoint' nodes are linked with each other through their 'remote-endpoint'
53 a device is partitioned into multiple data busses, e.g. 16-bit input port
54 divided into two separate ITU-R BT.656 8-bit busses. In such case bus-width
55 and data-shift properties can be used to assign physical data lines to each
59 --------------------------------
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/Documentation/admin-guide/hw-vuln/
Dspectre.rst1 .. SPDX-License-Identifier: GPL-2.0
3 Spectre Side Channels
6 Spectre is a class of side channel attacks that exploit branch prediction
8 bypassing access controls. Speculative execution side channel exploits
14 -------------------
16 Speculative execution side channel methods affect a wide range of modern
17 high performance processors, since most modern high speed processors
22 - Intel Core, Atom, Pentium, and Xeon processors
24 - AMD Phenom, EPYC, and Zen processors
26 - IBM POWER and zSeries processors
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/Documentation/spi/
Dspi-lm70llp.rst2 spi_lm70llp : LM70-LLP parport-to-SPI adapter
15 -----------
27 --------------------
28 The schematic for this particular board (the LM70EVAL-LLP) is
39 D0 2 - -
40 D1 3 --> V+ 5
41 D2 4 --> V+ 5
42 D3 5 --> V+ 5
43 D4 6 --> V+ 5
44 D5 7 --> nCS 8
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/Documentation/devicetree/bindings/hwmon/
Dti,tmp513.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Eric Tremblay <etremblay@distech-controls.com>
14 The TMP512 (dual-channel) and TMP513 (triple-channel) are system monitors
15 that include remote sensors, a local temperature sensor, and a high-side
17 remote temperatures, on-chip temperatures, and system voltage/power/current
28 - ti,tmp512
29 - ti,tmp513
34 shunt-resistor-micro-ohms:
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/Documentation/RCU/
DwhatisRCU.rst3 What is RCU? -- "Read, Copy, Update"
21 during the 2.5 development effort that is optimized for read-mostly
40 :ref:`6. ANALOGY WITH READER-WRITER LOCKING <6_whatisRCU>`
58 everything, feel free to read the whole thing -- but if you are really
60 never need this document anyway. ;-)
65 ----------------
94 b. Wait for all previous readers to complete their RCU read-side
103 use much lighter-weight synchronization, in some cases, absolutely no
104 synchronization at all. In contrast, in more conventional lock-based
105 schemes, readers must use heavy-weight synchronization in order to
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/Documentation/i2c/busses/
Di2c-parport.rst2 Kernel driver i2c-parport
7 This is a unified driver for several i2c-over-parallel-port adapters,
11 * i2c-philips-par
12 * i2c-elv
13 * i2c-velleman
14 * video/i2c-parport
25 * (type=6) Barco LPT->DVI (K5800236) adapter
27 * (type=8) VCT-jig
42 -------------------------
44 If you want to build you own i2c-over-parallel-port adapter, here is
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/Documentation/hid/
Dintel-ish-hid.rst6 processing to a dedicated low power co-processor. This allows the core
25 for a very high speed communication::
27 ----------------- ----------------------
28 | USB HID | --> | ISH HID |
29 ----------------- ----------------------
30 ----------------- ----------------------
31 | USB protocol | --> | ISH Transport |
32 ----------------- ----------------------
33 ----------------- ----------------------
34 | EHCI/XHCI | --> | ISH IPC |
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