Searched full:hits (Results 1 – 25 of 27) sorted by relevance
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/Documentation/devicetree/bindings/arc/ |
D | archs-pct.txt | 4 CPU and cache events like cache misses and hits. Like conventional PCT there
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D | pct.txt | 4 CPU and cache events like cache misses and hits. Like conventional PCT there
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/Documentation/trace/ |
D | kprobetrace.rst | 148 You can check the total number of probe hits and probe miss-hits via 150 The first column is event name, the second is the number of probe hits, 151 the third is the number of probe miss-hits. 255 Each line shows when the kernel hits an event, and <- SYMBOL means kernel
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D | histogram.rst | 19 aggregates event hits into a hash table keyed on one or more trace 36 event hits. If 'values' isn't specified, an implicit 'hitcount' 52 name, and trigger hits will update this common data. Only triggers 117 of hits that were ignored. The size should be a power of 2 between 276 Hits: 4610 290 totals for the run. The 'Hits' field shows the total number of 293 shows the number of hits that were dropped because the number of 302 every trigger implicitly keeps a count of the total number of hits 358 Hits: 4775 407 Hits: 109928 [all …]
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D | uprobetracer.rst | 81 You can check the total number of probe hits per event via 83 the second is the event name, the third is the number of probe hits.
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D | kprobes.rst | 68 When a CPU hits the breakpoint instruction, a trap occurs, the CPU's 569 so keep this in mind if you're not seeing the probe hits you expect. 581 probe handler. If a probe handler hits a probe, that second probe's 658 microseconds to process. Specifically, a benchmark that hits the same 660 million hits per second, depending on the architecture. A return-probe
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D | events.rst | 542 This command aggregates event hits into a hash table keyed on one or
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/Documentation/admin-guide/device-mapper/ |
D | cache.rst | 95 forwarded to the origin device; additionally, write hits cause cache 240 <#read hits> <#read misses> <#write hits> <#write misses> 255 #read hits Number of times a READ bio has been mapped 259 #write hits Number of times a WRITE bio has been mapped
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/Documentation/admin-guide/hw-vuln/ |
D | multihit.rst | 6 instruction fetch hits multiple entries in the instruction TLB. This can 109 the possibility of multiple hits. 118 the nested guest can trigger multiple iTLB hits by modifying its own
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/Documentation/ABI/testing/ |
D | sysfs-block-bcache | 28 For backing devices: integer number of full cache hits, 41 For backing devices: cache hits as a percentage.
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/Documentation/fb/ |
D | cmap_xfbdev.rst | 39 colormap. For example, Xfbdev hits the following:
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/Documentation/devicetree/bindings/arm/ |
D | pmu.yaml | 15 and hits. The interface to the PMU is part of the ARM ARM. The ARM PMU
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/Documentation/x86/ |
D | resctrl_ui.rst | 489 fill, and from that point on will only serve cache hits. The cache 514 the region continues to serve cache hits. 577 hits and misses. 594 residency (cache hits and misses) measurement captured in the 598 residency (cache hits and misses) measurement captured in the 634 Hits: 8192 638 Example of cache hits/misses debugging 641 cache of a platform. Here is how we can obtain details of the cache hits 660 pseudo_lock_mea-1672 [002] .... 3132.860500: pseudo_lock_l2: hits=4097 miss=0
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/Documentation/admin-guide/cgroup-v1/ |
D | memory.rst | 73 memory.failcnt show the number of memory usage hits limits 74 memory.memsw.failcnt show the number of memory+Swap hits limits 96 hits limits 102 hits limits 255 **What happens when a cgroup hits memory.memsw.limit_in_bytes** 257 When a cgroup hits memory.memsw.limit_in_bytes, it's useless to do swap-out 375 triggered for a cgroup when it hits K while staying below U, which makes 623 hit its limit. When a memory cgroup hits a limit, failcnt increases and
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/Documentation/devicetree/bindings/i2c/ |
D | i2c-demux-pinctrl.txt | 8 if your current runtime configuration hits an errata of the internal IP core.
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/Documentation/admin-guide/pm/ |
D | cpuidle.rst | 366 by the ``CPUIdle`` driver: ``hits``, ``misses`` and ``early_hits``. 368 The ``hits`` and ``misses`` metrics measure the likelihood that a given idle 374 them "matches" the sleep length). The ``hits`` metric is increased if the 393 to the sleep length. Then, the ``hits`` and ``misses`` metrics of that idle 394 state are compared with each other and it is preselected if the ``hits`` one is 403 latency within the constraint is preselected without consulting the ``hits``,
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/Documentation/driver-api/md/ |
D | raid5-cache.rst | 62 filesystems) right after the data hits cache disk. The data is flushed to raid
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/Documentation/scheduler/ |
D | sched-bwc.rst | 136 should also be considered, especially when single core usage hits 100%. If you
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/Documentation/input/devices/ |
D | ntrig.rst | 93 events until it hits thresholds and begins propagating. In the interest in
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/Documentation/timers/ |
D | timekeeping.rst | 153 independently on each CPU without any synchronization performance hits.
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/Documentation/admin-guide/ |
D | bcache.rst | 499 Hits and misses are counted per individual IO as bcache sees them; a 503 Hits and misses for IO that is intended to skip the cache are still counted,
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/Documentation/locking/ |
D | ww-mutex-design.rst | 261 when the dynamic locking step hits -EDEADLK we also need to unlock all the
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/Documentation/devicetree/bindings/fpga/ |
D | fpga-region.txt | 22 This device tree binding document hits some of the high points of FPGA usage and
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/Documentation/scsi/ |
D | scsi_mid_low_api.rst | 186 scsi_host_put() when the reference count hits zero.
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/Documentation/block/ |
D | biodoc.rst | 470 atomic_t bi_cnt; /* pin count: free when it hits zero */
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