| /Documentation/arm/samsung/ |
| D | gpio.rst | 2 Samsung GPIO implementation
8 This outlines the Samsung GPIO implementation and the architecture
16 about these devices. Their implementation has been brought into line
17 with the core samsung implementation described in this document.
23 The gpio implementation uses gpiolib as much as possible, only providing
35 implementation to configure pins as necessary.
|
| /Documentation/crypto/ |
| D | architecture.rst | 103 the following implementations: AES-NI, assembler implementation, or
105 which cipher implementation is used? The answer to that question is the
106 priority number assigned to each cipher implementation by the kernel
109 implementations providing an implementation with that name and selects
110 the implementation with the highest priority.
113 implementation and thus does not want to rely on the priority-based
115 the cipher implementation to register a unique name in addition to
117 sure to refer to the intended cipher implementation.
133 - module: the kernel module providing the cipher implementation (or
136 - priority: the priority value of the cipher implementation
[all …]
|
| D | intro.rst | 43 The transformation implementation is an actual code or interface to
48 implementation. There can be multiple transformation objects associated
49 with a single transformation implementation. Each of those
52 consumer requests a transformation implementation. The consumer is then
|
| /Documentation/networking/ |
| D | x25.rst | 8 write an X.25 implementation for Linux. My aim is to provide a complete X.25
15 I therefore decided to write the implementation such that as far as the
18 implementation of LAPB. Therefore the LAPB modules would be called by
22 To confuse matters a little, an 802.2 LLC implementation for Linux is being
27 implementation is being done as part of another protocol project (SNA) and
|
| D | sctp.rst | 8 implementation.
21 The initial project goal is to create an Linux kernel reference implementation
33 implementation and testing lksctp on IPv4.
|
| D | ipsec.rst | 33 is implementation dependent.
35 Current IPComp implementation is indeed by the book, while as in practice
|
| /Documentation/core-api/ |
| D | genericirq.rst | 28 The original implementation of interrupt handling in Linux uses the
33 a quite universal set for the ARM interrupt handler implementation in
42 During the implementation we identified another type:
51 This split implementation of high-level IRQ handlers allows us to
56 The original general IRQ implementation used hw_interrupt_type
76 flow handler implementation also makes it simple to provide
82 IRQ-flow implementation for 'level type' interrupts and add a
83 (sub)architecture specific 'edge type' implementation.
225 handle_level_irq provides a generic implementation for level-triggered
238 handle_fasteoi_irq provides a generic implementation for interrupts,
[all …]
|
| /Documentation/networking/caif/ |
| D | linux_caif.rst | 29 The implementation of CAIF is divided into:
32 * CAIF Core Protocol Implementation
59 Implementation chapter
75 The Core CAIF implementation contains:
77 - Simple implementation of CAIF.
92 Implementation. The support functions include:
94 - CFPKT CAIF Packet. Implementation of CAIF Protocol Packet. The
98 The CAIF Protocol implementation contains:
|
| /Documentation/locking/ |
| D | futex-requeue-pi.rst | 16 Without requeue_pi, the glibc implementation of
20 implementation would wake the highest-priority waiter, and leave the
56 user space already holding the PI futex. The glibc implementation
81 The actual glibc implementation will likely test for PI and make the
86 Implementation chapter
106 to be requeued to a PI-aware futex. The implementation is the
|
| D | pi-futex.rst | 14 - the in-kernel PI implementation is streamlined around the mutex
15 abstraction, with strict rules that keep the implementation
55 implementation to user-space.
75 Implementation chapter
|
| /Documentation/driver-api/ |
| D | men-chameleon-bus.rst | 9 1.2 Limitations of the current implementation
26 This document describes the architecture and implementation of the MEN
33 implementation and does by no means describe the complete possibilities of MCB
36 Limitations of the current implementation
39 The current implementation is limited to PCI and PCIe based carrier devices
68 not handled by the MCB implementation.
97 The current implementation assigns exactly one memory and one IRQ resource
|
| /Documentation/userspace-api/media/dvb/ |
| D | legacy_dvb_apis.rst | 22 code implementation, as this section of the document was written
24 implementation.
|
| /Documentation/networking/devlink/ |
| D | devlink-reload.rst | 34 implementation might require to perform another action alongside with
42 By default reload actions are not limited and driver implementation may
46 implementation to specific constraints.
|
| /Documentation/watchdog/ |
| D | mlx-wdt.rst | 31 Type 1 HW watchdog implementation exist in old systems and
33 Two types of HW implementation have also different register map.
35 Type 3 HW watchdog implementation can exist on all Mellanox systems
|
| /Documentation/devicetree/bindings/nios2/ |
| D | nios2.txt | 35 - altr,implementation: Nios II core implementation, this should be "fast";
50 altr,implementation = "fast";
|
| /Documentation/arm/ |
| D | vlocks.rst | 119 ARM implementation
122 The current ARM implementation [2] contains some optimisations beyond
130 In the ARM implementation, this means that we can use a single load
159 implementation uses a simple loop of word-sized loads for this
166 implementation.
171 implementation removes many of the barriers which would be required
|
| /Documentation/driver-api/iio/ |
| D | hw-consumer.rst | 7 software buffer for data. The implementation can be found under
21 As standard IIO device the implementation is based on IIO provider/consumer.
|
| /Documentation/driver-api/soundwire/ |
| D | error_handling.rst | 15 and audio data. The current implementation only logs such errors.
62 that the Slave might behave in implementation-defined ways. The bus
63 implementation does not provide a recovery mechanism for such errors, Slave
|
| /Documentation/bpf/ |
| D | ringbuf.rst | 5 This document describes BPF ring buffer design, API, and implementation details.
16 implementation.
24 also solved by having an MPSC implementation of ring buffer. The ordering
143 Design and Implementation
185 One interesting implementation bit, that significantly simplifies (and thus
186 speeds up as well) implementation of both producers and consumers is how data
196 ``bpf_ringbuf_commit()`` implementation will send a notification of new record
|
| D | prog_flow_dissector.rst | 122 Reference Implementation
126 implementation and ``tools/testing/selftests/bpf/flow_dissector_load.[hc]``
129 The reference implementation is organized as follows:
142 C-based implementation can export. Notable example is single VLAN (802.1Q)
|
| /Documentation/driver-api/media/drivers/ |
| D | pvrusb2.rst | 29 1. Low level wire-protocol implementation with the device.
31 2. I2C adaptor implementation and corresponding I2C client drivers
34 3. High level hardware driver implementation which coordinates all
53 implementation and interface isolated from each other. Thus while
110 implementation had to be completely different.
150 pvrusb2-i2c-core.[ch] - This module provides an implementation of a
|
| /Documentation/timers/ |
| D | hrtimers.rst | 36 - the implementation of the current posix-timer subsystem on top of
78 hrtimer subsystem implementation details
106 implementation needed to keep an extra list of all armed absolute
112 scaling code from the posix-timer implementation - the clock can simply
152 the hrtimer implementation details in praxis, and we also ran the posix
175 hrtimers-based high-resolution clock implementation, so the hrtimers
|
| /Documentation/driver-api/thermal/ |
| D | cpu-cooling-api.rst | 71 For a given processor implementation the primary factors are:
93 implementation specific processor support and characterisation
94 factors. Therefore, in initial implementation that contribution is
|
| /Documentation/PCI/ |
| D | pci-error-recovery.rst | 52 The biggest reason for choosing a kernel-based implementation rather
53 than a user-space implementation was the need to deal with bus
69 Design and implementation details below, based on a chain of
76 arch/powerpc implementation will simulate a PCI hotplug remove/add.
170 The current powerpc implementation assumes that a device driver will
172 implementation uses one kernel thread to notify all devices;
175 recovery implementation (e.g. waiting for all notification threads
179 The current powerpc implementation doesn't much care if the device
330 The current powerpc implementation does not try a power-cycle
405 Implementation details for the powerpc platform are discussed in
|
| /Documentation/admin-guide/ |
| D | lockup-watchdogs.rst | 9 kernel mode for more than 20 seconds (see "Implementation" below for
19 kernel mode for more than 10 seconds (see "Implementation" below for
33 Implementation subtitle
|