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/Documentation/devicetree/bindings/iio/adc/
Dfsl,imx7d-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/fsl,imx7d-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale ADC found on the imx7d SoC
10 - Haibo Chen <haibo.chen@nxp.com>
14 const: fsl,imx7d-adc
25 clock-names:
28 vref-supply: true
30 "#io-channel-cells":
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/Documentation/devicetree/bindings/clock/
Dimx7d-clock.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/imx7d-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Clock bindings for Freescale i.MX7 Dual
10 - Frank Li <Frank.Li@nxp.com>
11 - Anson Huang <Anson.Huang@nxp.com>
14 The clock consumer should specify the desired clock by having the clock
15 ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx7d-clock.h
16 for the full list of i.MX7 Dual clock IDs.
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Dimx8qxp-lpcg.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/imx8qxp-lpcg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8QXP LPCG (Low-Power Clock Gating) Clock bindings
10 - Aisheng Dong <aisheng.dong@nxp.com>
13 The Low-Power Clock Gate (LPCG) modules contain a local programming
14 model to control the clock gates for the peripherals. An LPCG module
17 This level of clock gating is provided after the clocks are generated
18 by the SCU resources and clock controls. Thus even if the clock is
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/Documentation/devicetree/bindings/remoteproc/
Dimx-rproc.txt1 NXP iMX6SX/iMX7D Co-Processor Bindings
2 ----------------------------------------
4 This binding provides support for ARM Cortex M4 Co-processor found on some
8 - compatible Should be one of:
9 "fsl,imx7d-cm4"
10 "fsl,imx6sx-cm4"
11 - clocks Clock for co-processor (See: ../clock/clock-bindings.txt)
12 - syscon Phandle to syscon block which provide access to
16 - memory-region list of phandels to the reserved memory regions.
17 (See: ../reserved-memory/reserved-memory.txt)
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/Documentation/devicetree/bindings/pci/
Dfsl,imx6q-pcie.txt4 and thus inherits all the common properties defined in designware-pcie.txt.
7 - compatible:
8 - "fsl,imx6q-pcie"
9 - "fsl,imx6sx-pcie",
10 - "fsl,imx6qp-pcie"
11 - "fsl,imx7d-pcie"
12 - "fsl,imx8mq-pcie"
13 - reg: base address and length of the PCIe controller
14 - interrupts: A list of interrupt outputs of the controller. Must contain an
15 entry for each entry in the interrupt-names property.
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/Documentation/devicetree/bindings/media/
Dfsl-pxp.txt4 The Pixel Pipeline (PXP) is a memory-to-memory graphics processing engine
10 - compatible: should be "fsl,<soc>-pxp", where SoC can be one of imx23, imx28,
11 imx6dl, imx6sl, imx6sll, imx6ul, imx6sx, imx6ull, or imx7d.
12 - reg: the register base and size for the device registers
13 - interrupts: the PXP interrupt, two interrupts for imx6ull and imx7d.
14 - clock-names: should be "axi"
15 - clocks: the PXP AXI clock
20 compatible = "fsl,imx6ull-pxp";
24 clock-names = "axi";
/Documentation/devicetree/bindings/mtd/
Dgpmi-nand.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/gpmi-nand.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale General-Purpose Media Interface (GPMI) binding
10 - Han Xu <han.xu@nxp.com>
13 - $ref: "nand-controller.yaml"
17 flash chips. The device tree may optionally contain sub-nodes
24 - enum:
25 - fsl,imx23-gpmi-nand
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/Documentation/devicetree/bindings/mmc/
Dfsl-imx-esdhc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/fsl-imx-esdhc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
13 - $ref: "mmc-controller.yaml"
20 by mmc.txt and the properties used by the sdhci-esdhc-imx driver.
25 - enum:
26 - fsl,imx25-esdhc
27 - fsl,imx35-esdhc
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/Documentation/devicetree/bindings/pwm/
Dimx-pwm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pwm/imx-pwm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Philipp Zabel <p.zabel@pengutronix.de>
13 "#pwm-cells":
18 - 2
19 - 3
23 - enum:
24 - fsl,imx1-pwm
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/Documentation/devicetree/bindings/i2c/
Di2c-imx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-imx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale Inter IC (I2C) and High Speed Inter IC (HS-I2C) for i.MX
10 - Wolfram Sang <wolfram@the-dreams.de>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
18 - const: fsl,imx1-i2c
19 - const: fsl,imx21-i2c
20 - const: fsl,vf610-i2c
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/Documentation/devicetree/bindings/spi/
Dfsl-imx-cspi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/fsl-imx-cspi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
13 - $ref: "/schemas/spi/spi-controller.yaml#"
18 - const: fsl,imx1-cspi
19 - const: fsl,imx21-cspi
20 - const: fsl,imx27-cspi
21 - const: fsl,imx31-cspi
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Dspi-fsl-qspi.txt4 - compatible : Should be "fsl,vf610-qspi", "fsl,imx6sx-qspi",
5 "fsl,imx7d-qspi", "fsl,imx6ul-qspi",
6 "fsl,ls1021a-qspi", "fsl,ls2080a-qspi"
8 "fsl,ls1043a-qspi" followed by "fsl,ls1021a-qspi"
9 - reg : the first contains the register location and length,
11 - reg-names: Should contain the reg names "QuadSPI" and "QuadSPI-memory"
12 - interrupts : Should contain the interrupt for the device
13 - clocks : The clocks needed by the QuadSPI controller
14 - clock-names : Should contain the name of the clocks: "qspi_en" and "qspi".
17 - reg: There are two buses (A and B) with two chip selects each.
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/Documentation/devicetree/bindings/nvmem/
Dimx-ocotp.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/nvmem/imx-ocotp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX6 On-Chip OTP Controller (OCOTP) device tree bindings
10 - Anson Huang <Anson.Huang@nxp.com>
13 This binding represents the on-chip eFuse OTP controller found on
18 - $ref: "nvmem.yaml#"
23 - items:
24 - enum:
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/Documentation/devicetree/bindings/net/can/
Dfsl,flexcan.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 Flexcan CAN controller on Freescale's ARM and PowerPC system-on-a-chip (SOC).
11 - Marc Kleine-Budde <mkl@pengutronix.de>
14 - $ref: can-controller.yaml#
19 - enum:
20 - fsl,imx8qm-flexcan
21 - fsl,imx8mp-flexcan
22 - fsl,imx6q-flexcan
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/Documentation/devicetree/bindings/thermal/
Dimx-thermal.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/thermal/imx-thermal.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
11 - Anson Huang <Anson.Huang@nxp.com>
16 - fsl,imx6q-tempmon
17 - fsl,imx6sx-tempmon
18 - fsl,imx7d-tempmon
32 nvmem-cells:
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/Documentation/devicetree/bindings/usb/
Dci-hdrc-usb2.txt4 - compatible: should be one of:
5 "fsl,imx23-usb"
6 "fsl,imx27-usb"
7 "fsl,imx28-usb"
8 "fsl,imx6q-usb"
9 "fsl,imx6sl-usb"
10 "fsl,imx6sx-usb"
11 "fsl,imx6ul-usb"
12 "fsl,imx7d-usb"
13 "fsl,imx7ulp-usb"
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