Searched full:iommus (Results 1 – 25 of 57) sorted by relevance
123
| /Documentation/devicetree/bindings/virtio/ |
| D | mmio.txt | 14 linked to DMA masters using the "iommus" or "iommu-map"
16 "iommus" property. For virtio-iommu #iommu-cells must be
21 - iommus: If the device accesses memory through an IOMMU, it should
22 have an "iommus" property [1]. Since virtio-iommu itself
24 node cannot have both an "#iommu-cells" and an "iommus"
35 iommus = <&viommu 23>
|
| D | iommu.txt | 19 an endpoint ID, described by the "iommus" property [2].
25 virtio-iommu node doesn't have an "iommus" property, and is omitted from
62 iommus = <&iommu0 0x20000>;
|
| /Documentation/devicetree/bindings/media/ |
| D | qcom,msm8916-venus.yaml | 39 iommus:
77 iommus:
81 - iommus
90 - iommus
111 iommus = <&apps_iommu 5>;
|
| D | qcom,sdm845-venus-v2.yaml | 53 iommus:
91 iommus:
95 - iommus
105 - iommus
135 iommus = <&apps_smmu 0x10a0 0x8>,
|
| D | qcom,sc7180-venus.yaml | 50 iommus:
96 iommus:
100 - iommus
110 - iommus
136 iommus = <&apps_smmu 0x0c00 0x60>;
|
| D | qcom,sdm845-venus.yaml | 39 iommus:
105 iommus:
109 - iommus
118 - iommus
139 iommus = <&apps_smmu 0x10a0 0x8>,
|
| D | mediatek-mdp.txt | 27 - iommus: should point to the respective IOMMU block with master port as
42 iommus = <&iommu M4U_PORT_MDP_RDMA0>;
53 iommus = <&iommu M4U_PORT_MDP_RDMA1>;
83 iommus = <&iommu M4U_PORT_MDP_WDMA>;
92 iommus = <&iommu M4U_PORT_MDP_WROT0>;
101 iommus = <&iommu M4U_PORT_MDP_WROT1>;
|
| D | qcom,msm8996-venus.yaml | 40 iommus:
104 iommus:
108 - iommus
117 - iommus
139 iommus = <&venus_smmu 0x00>,
|
| D | mediatek-jpeg-encoder.txt | 19 - iommus: should point to the respective IOMMU block with master port as
33 iommus = <&iommu MT2701_M4U_PORT_JPGENC_RDMA>,
|
| D | mediatek-jpeg-decoder.txt | 21 - iommus: should point to the respective IOMMU block with master port as
36 iommus = <&iommu MT2701_M4U_PORT_JPGDEC_WDMA>,
|
| D | renesas,fcp.yaml | 34 iommus:
64 iommus = <&ipmmu_vi0 9>;
|
| D | rockchip,vdec.yaml | 43 iommus:
70 iommus = <&vdec_mmu>;
|
| D | rockchip-vpu.yaml | 48 iommus:
76 iommus = <&vpu_mmu>;
|
| D | nvidia,tegra-vde.txt | 38 - iommus: Must contain phandle to the IOMMU device node.
63 iommus = <&mc TEGRA_SWGROUP_VDE>;
|
| D | mediatek-vcodec.txt | 20 - iommus : should point to the respective IOMMU block with master port as
46 iommus = <&iommu M4U_PORT_HW_VDEC_MC_EXT>,
91 iommus = <&iommu M4U_PORT_VENC_RCPU>,
|
| D | ti,omap3isp.txt | 16 iommus : phandle and IOMMU specifier for the IOMMU that serves the ISP
63 iommus = <&mmu_isp>;
|
| /Documentation/devicetree/bindings/iommu/ |
| D | iommu.txt | 1 This document describes the generic device tree binding for IOMMUs and their
29 IOMMUs can be single-master or multiple-master. Single-master IOMMU devices
75 - iommus: A list of phandle and IOMMU specifier pairs that describe the IOMMU
79 When an "iommus" property is specified in a device tree node, the IOMMU will
99 One possible extension to the above is to use an "iommus" property along with
119 iommus = <&{/iommu}>;
141 iommus = <&{/iommu}>;
147 iommus = <&{/iommu}>;
160 iommus = <&{/iommu} 42>;
165 iommus = <&{/iommu} 23>, <&{/iommu} 24>;
[all …]
|
| D | qcom,iommu.txt | 16 - clock-names : Should be a pair of "iface" (required for IOMMUs
18 the IOMMUs underlying bus access).
110 iommus = <&apps_iommu 5>;
115 iommus = <&apps_iommu 4>;
120 iommus = <&gpu_iommu 1>, <&gpu_iommu 2>;
|
| D | msm,iommu-v0.txt | 34 - iommus: A reference to the IOMMU in multiple cells. The first cell is a
38 are required to list all the iommus and the stream ids that the
62 iommus = <&mdp_port0 0
|
| /Documentation/devicetree/bindings/gpu/ |
| D | nvidia,gk20a.txt | 40 - iommus: A reference to the IOMMU. See ../iommu/iommu.txt for details.
57 iommus = <&mc TEGRA_SWGROUP_GPU>;
75 iommus = <&mc TEGRA_SWGROUP_GPU>;
93 iommus = <&smmu TEGRA186_SID_GPU>;
114 iommus = <&smmu TEGRA194_SID_GPU>;
|
| /Documentation/devicetree/bindings/display/mediatek/ |
| D | mediatek,disp.txt | 65 - iommus: Should point to the respective IOMMU block with master port as
84 iommus = <&iommu M4U_PORT_DISP_OVL0>;
94 iommus = <&iommu M4U_PORT_DISP_OVL1>;
104 iommus = <&iommu M4U_PORT_DISP_RDMA0>;
114 iommus = <&iommu M4U_PORT_DISP_RDMA1>;
124 iommus = <&iommu M4U_PORT_DISP_RDMA2>;
134 iommus = <&iommu M4U_PORT_DISP_WDMA0>;
144 iommus = <&iommu M4U_PORT_DISP_WDMA1>;
|
| /Documentation/devicetree/bindings/crypto/ |
| D | hisilicon,hip07-sec.txt | 22 - iommus: The SEC units are behind smmu-v3 iommus.
48 iommus = <&p1_smmu_alg_a 0x600>;
|
| /Documentation/devicetree/bindings/display/msm/ |
| D | gmu.yaml | 74 iommus:
89 - iommus
123 iommus = <&adreno_smmu 5>;
|
| /Documentation/devicetree/bindings/dma/ |
| D | qcom_hidma_mgmt.txt | 55 - iommus: required a iommu node
82 iommus = <&system_mmu>;
94 iommus = <&system_mmu>;
|
| /Documentation/devicetree/bindings/remoteproc/ |
| D | ti,omap-remoteproc.yaml | 33 same SoC. Examples of constant properties include 'iommus', 'reg'. The
49 iommus:
207 - iommus
238 iommus = <&mmu_dsp>;
275 iommus = <&mmu_ipu>;
315 iommus = <&mmu0_dsp1>, <&mmu1_dsp1>;
|
123