Searched full:latency (Results 1 – 25 of 188) sorted by relevance
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| /Documentation/devicetree/bindings/power/ |
| D | domain-idle-state.yaml | 30 entry-latency-us:
32 The worst case latency in microseconds required to enter the idle
33 state. Note that, the exit-latency-us duration may be guaranteed only
34 after the entry-latency-us has passed.
36 exit-latency-us:
38 The worst case latency in microseconds required to exit the idle
49 - entry-latency-us
50 - exit-latency-us
61 entry-latency-us = <20>;
62 exit-latency-us = <40>;
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| D | power-domain.yaml | 122 entry-latency-us = <1000>;
123 exit-latency-us = <2000>;
129 entry-latency-us = <5000>;
130 exit-latency-us = <8000>;
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| /Documentation/devicetree/bindings/opp/ |
| D | qcom-nvmem-cpufreq.txt | 152 clock-latency-ns = <200000>;
158 clock-latency-ns = <200000>;
164 clock-latency-ns = <200000>;
170 clock-latency-ns = <200000>;
176 clock-latency-ns = <200000>;
182 clock-latency-ns = <200000>;
188 clock-latency-ns = <200000>;
194 clock-latency-ns = <200000>;
200 clock-latency-ns = <200000>;
206 clock-latency-ns = <200000>;
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| D | allwinner,sun50i-h6-operating-points.yaml | 68 clock-latency-ns = <244144>; /* 8 32k periods */
77 clock-latency-ns = <244144>; /* 8 32k periods */
86 clock-latency-ns = <244144>; /* 8 32k periods */
95 clock-latency-ns = <244144>; /* 8 32k periods */
104 clock-latency-ns = <244144>; /* 8 32k periods */
113 clock-latency-ns = <244144>; /* 8 32k periods */
122 clock-latency-ns = <244144>; /* 8 32k periods */
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| D | opp.txt | 146 - clock-latency-ns: Specifies the maximum possible transition latency (in
225 clock-latency-ns = <300000>;
232 clock-latency-ns = <310000>;
237 clock-latency-ns = <290000>;
304 clock-latency-ns = <300000>;
311 clock-latency-ns = <310000>;
317 lock-latency-ns = <290000>;
380 clock-latency-ns = <300000>;
387 clock-latency-ns = <310000>;
393 clock-latency-ns = <290000>;
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| /Documentation/power/ |
| D | pm_qos_interface.rst | 10 * CPU latency QoS.
12 per-device latency constraints and PM QoS flags.
14 The latency unit used in the PM QoS framework is the microsecond (usec).
20 A global list of CPU latency QoS requests is maintained along with an aggregated
22 to the request list or elements of the list. For CPU latency QoS, the
32 Will insert an element into the CPU latency QoS list with the target value.
49 Returns the aggregated value for the CPU latency QoS.
53 CPU latency QoS list.
56 Adds a notification callback function to the CPU latency QoS. The callback is
57 called when the aggregated value for the CPU latency QoS is changed.
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| /Documentation/devicetree/bindings/arm/ |
| D | idle-states.yaml | 39 Idle state parameters (e.g. entry latency) are platform specific and need to
61 | latency |
63 | latency |
65 |<------- wakeup-latency ------->|
73 event conditions. The abort latency is assumed to be negligible
87 entry-latency: Worst case latency required to enter the idle state. The
88 exit-latency may be guaranteed only after entry-latency has passed.
93 wakeup-latency: Maximum delay between the signaling of a wake-up event and the
95 to be entry-latency + exit-latency.
107 wakeup-delay = exit-latency + max(entry-latency - (now - entry-timestamp), 0)
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| D | l2c2x0.yaml | 69 arm,data-latency:
70 description: Cycles of latency for Data RAM accesses. Specifies 3 cells of
72 without setup latency control should use a value of 0.
80 arm,tag-latency:
81 description: Cycles of latency for Tag RAM accesses. Specifies 3 cells of
82 read, write and setup latencies. Controllers without setup latency control
83 should use 0. Controllers without separate read and write Tag RAM latency
92 arm,dirty-latency:
93 description: Cycles of latency for Dirty RAMs. This is a single cell.
234 arm,data-latency = <1 1 1>;
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| D | psci.yaml | 221 entry-latency-us = <10>;
222 exit-latency-us = <10>;
232 entry-latency-us = <500>;
233 exit-latency-us = <500>;
240 entry-latency-us = <2000>;
241 exit-latency-us = <2000>;
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| /Documentation/devicetree/bindings/memory-controllers/ |
| D | baikal,bt1-l2-ctl.yaml | 27 baikal,l2-ws-latency:
29 description: Cycles of latency for Way-select RAM accesses
34 baikal,l2-tag-latency:
36 description: Cycles of latency for Tag RAM accesses
41 baikal,l2-data-latency:
43 description: Cycles of latency for Data RAM accesses
59 baikal,l2-ws-latency = <1>;
60 baikal,l2-tag-latency = <1>;
61 baikal,l2-data-latency = <2>;
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| /Documentation/arm/omap/ |
| D | omap_pm.rst | 6 authors use these functions to communicate minimum latency or
17 latency framework or something else;
20 latency and throughput, rather than units which are specific to OMAP
34 1. Set the maximum MPU wakeup latency::
38 2. Set the maximum device wakeup latency::
42 3. Set the maximum system DMA transfer start latency (CORE pwrdm)::
88 latency, and the set_max_dev_wakeup_lat() function to constrain the
89 device wakeup latency (from clk_enable() to accessibility). For
92 /* Limit MPU wakeup latency */
96 /* Limit device powerdomain wakeup latency */
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| /Documentation/trace/ |
| D | hwlat_detector.rst | 2 Hardware Latency Detector
14 kernel is highly latency sensitive.
24 The hardware latency detector works by hogging one of the cpus for configurable
40 redefine the threshold in microseconds (us) above which latency spikes will
74 - tracing_threshold - minimum latency value to be considered (usecs)
75 - tracing_max_latency - maximum hardware latency actually observed (usecs)
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| D | ftrace.rst | 28 There's latency tracing to examine what occurs between interrupts
169 Some of the tracers record the max latency.
173 recorded if the latency is greater than the value in this file
176 By echoing in a time into this file, no latency will be recorded
181 Some latency tracers will record a trace whenever the
182 latency is greater than the number in this file.
635 Directory for the Hardware Latency Detector.
636 See "Hardware Latency Detector" section below.
744 The Hardware Latency tracer is used to detect if the hardware
745 produces any latency. See "Hardware Latency Detector" section
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| /Documentation/networking/ |
| D | tcp-thin.rst | 13 on the data delivery latency, packet loss can be devastating for
25 In order to reduce application-layer latency when packets are lost,
26 a set of mechanisms has been made, which address these latency issues
50 "Improving latency for interactive, thin-stream applications over
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| /Documentation/devicetree/bindings/cpufreq/ |
| D | nvidia,tegra124-cpufreq.txt | 17 - clock-latency: Specify the possible maximum transition latency for clock,
36 clock-latency = <300000>;
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| D | cpufreq-dt.txt | 17 - clock-latency: Specify the possible maximum transition latency for clock,
40 clock-latency = <61036>; /* two CLK32 periods */
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| D | cpufreq-spear.txt | 13 - clock-latency: Specify the possible maximum transition latency for clock, in
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| /Documentation/devicetree/bindings/thermal/ |
| D | thermal-idle.yaml | 38 exit-latency-us:
40 The exit latency constraint in microsecond for the injected idle state
41 for the device. It is the latency constraint to apply when selecting an
72 exit-latency-us = <500>;
88 exit-latency-us = <500>;
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| /Documentation/devicetree/bindings/arm/msm/ |
| D | qcom,idle-state.txt | 5 states. Idle states have different enter/exit latency and residency values.
31 state. Retention may have a slightly higher latency than Standby.
52 power modes possible at this state is vast, the exit latency and the residency
78 entry-latency-us = <150>;
79 exit-latency-us = <200>;
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| /Documentation/block/ |
| D | bfq-iosched.rst | 6 low-latency capabilities. In addition to cgroups support (blkio or io
10 low latency for time-sensitive applications, such as audio or video
16 In its default configuration, BFQ privileges latency over
17 throughput. So, when needed for achieving a lower latency, BFQ builds
20 throughput at all times, then do switch off all low-latency heuristics
23 latency and throughput, or on how to maximize throughput.
81 Low latency for interactive applications
102 Low latency for soft real-time applications
105 players/streamers, enjoy a low latency and a low drop rate, regardless
204 guaranteeing low latency or fairness. In these cases, overall
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| D | kyber-iosched.rst | 11 Target latency for reads (in nanoseconds).
15 Target latency for synchronous writes (in nanoseconds).
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| /Documentation/admin-guide/pm/ |
| D | cpuidle.rst | 107 next wakeup event, or there are strict latency constraints preventing any of the
135 *exit latency*. The target residency is the minimum time the hardware must
140 latency, in turn, is the maximum time it will take a CPU asking the processor
142 wakeup from that state. Note that in general the exit latency also must cover
308 Then, the governor computes an extra latency limit to help "interactive"
309 workloads. It uses the observation that if the exit latency of the selected
315 of the extra latency limit is the predicted idle duration itself which
318 complete. The result of that division is compared with the latency limit coming
321 exit latency.
325 the predicted idle duration and the exit latency of it with the computed latency
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| /Documentation/ABI/testing/ |
| D | sysfs-devices-power | 209 contains the PM QoS resume latency limit for the given device,
214 the PM QoS resume latency may be arbitrary and the special value
215 "n/a" means that user space cannot accept any resume latency at
229 contains the PM QoS active state latency tolerance limit for the
231 latency the device can suffer without any visible adverse
233 string "any", the latency does not matter to user space at all,
234 but hardware should not be allowed to set the latency tolerance
238 access latency for the device may be determined automatically
241 latency tolerance requirements from the kernel side.
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| /Documentation/networking/device_drivers/ethernet/intel/ |
| D | e1000e.rst | 53 vector can generate per second. Increasing ITR lowers latency at the cost of
60 but will increase latency as packets are not processed as quickly.
64 all traffic types, but lacking in small packet performance and latency.
77 "Bulk traffic", for large amounts of packets of normal size; "Low latency",
79 packets; and "Lowest latency", for almost completely small packets or
83 Turns off any interrupt moderation and may improve small packet latency.
88 very low latency. This can sometimes cause extra CPU utilization. If
89 planning on deploying e1000e in a latency sensitive environment, this
94 the "Low latency" or "Lowest latency" class, the InterruptThrottleRate is
108 latency as packets are not processed as quickly.
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| /Documentation/admin-guide/mm/ |
| D | ksm.rst | 97 latency to access of shared pages. Systems with more nodes, at
99 lower latency of setting 0. Smaller systems, which need to
136 deduplication limit to avoid high latency for virtual memory
144 latency for certain virtual memory operations happening during
147 memory operations. The scheduler latency of other tasks not
156 lower latency, but they will make ksmd use more CPU during the
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