Searched +full:low +full:- +full:power (Results 1 – 25 of 362) sorted by relevance
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| /Documentation/firmware-guide/acpi/ |
| D | lpit.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 Low Power Idle Table (LPIT)
7 To enumerate platform Low Power Idle states, Intel platforms are using
8 “Low Power Idle Table” (LPIT). More details about this table can be
12 Residencies for each low power state can be read via FFH
18 - CPU PKG C10 (Read via FFH interface)
19 - Platform Controller Hub (PCH) SLP_S0 (Read via memory mapped interface)
32 This is the lowest possible system power state, achieved only when CPU is in
33 PKG C10 and all functional blocks in PCH are in a low power state.
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| /Documentation/ABI/testing/ |
| D | sysfs-bus-iio-vf610 | 3 Contact: linux-iio@vger.kernel.org
6 available modes are "normal", "high-speed" and "low-power",
12 Contact: linux-iio@vger.kernel.org
15 The two available modes are "high-power" and "low-power",
16 where "low-power" mode is the default mode.
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| /Documentation/hwmon/ |
| D | ltc2947.rst | 1 Kernel drivers ltc2947-i2c and ltc2947-spi
10 Addresses scanned: -
14 https://www.analog.com/media/en/technical-documentation/data-sheets/LTC2947.pdf
21 The LTC2947 is a high precision power and energy monitor that measures current,
22 voltage, power, temperature, charge and energy. The device supports both SPI
37 The following attributes are supported. Limits are read-write, reset_history
38 is write-only and all the other attributes are read-only.
41 in0_input VP-VM voltage (mV).
49 in0_label Channel label (VP-VM)
61 curr1_input IP-IM Sense current (mA)
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| D | ina2xx.rst | 10 Addresses: I2C 0x40 - 0x4f
20 Addresses: I2C 0x40 - 0x4f
30 Addresses: I2C 0x40 - 0x4f
40 Addresses: I2C 0x40 - 0x4f
50 Addresses: I2C 0x40 - 0x4f
59 -----------
61 The INA219 is a high-side current shunt and power monitor with an I2C
65 The INA220 is a high or low side current shunt and power monitor with an I2C
68 The INA226 is a current shunt and power monitor with an I2C interface.
71 INA230 and INA231 are high or low side current shunt and power monitors
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| D | ir35221.rst | 9 Addresses scanned: -
13 Author: Samuel Mendoza-Jonas <sam@mendozajonas.com>
17 -----------
19 IR35221 is a Digital DC-DC Multiphase Converter
23 -----------
32 # echo ir35221 0x70 > /sys/bus/i2c/devices/i2c-4/new_device
36 ----------------
44 curr[2-3]_label "iout[1-2]"
45 curr[2-3]_input Measured output current
46 curr[2-3]_crit Critical maximum current
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| D | pmbus.rst | 10 Addresses scanned: -
14 http://archive.ericsson.net/service/internet/picov/get?DocNo=28701-EN/LZT146395
20 Addresses scanned: -
24 https://www.onsemi.com/pub_link/Collateral/ADP4000-D.PDF
26 https://www.onsemi.com/pub_link/Collateral/NCP4200-D.PDF
28 https://www.onsemi.com/pub_link/Collateral/JUNE%202009-%20REV.%200.PDF
30 * Lineage Power
34 Addresses scanned: -
52 Addresses scanned: -
70 Addresses scanned: -
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| /Documentation/devicetree/bindings/usb/ |
| D | pxa-usb.txt | 6 - compatible: Should be "marvell,pxa-ohci" for USB controllers
10 - "marvell,enable-port1", "marvell,enable-port2", "marvell,enable-port3"
12 - "marvell,port-mode" selects the mode of the ports:
16 - "marvell,power-sense-low" - power sense pin is low-active.
17 - "marvell,power-control-low" - power control pin is low-active.
18 - "marvell,no-oc-protection" - disable over-current protection.
19 - "marvell,oc-mode-perport" - enable per-port over-current protection.
20 - "marvell,power_on_delay" Power On to Power Good time - in ms.
25 compatible = "marvell,pxa-ohci", "usb-ohci";
28 marvell,enable-port1;
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| /Documentation/devicetree/bindings/mfd/ |
| D | max77620.txt | 1 MAX77620 Power management IC from Maxim Semiconductor.
4 -------------------
5 - compatible: Must be one of
9 - reg: I2C device address.
12 -------------------
13 - interrupts: The interrupt on the parent the controller is
15 - interrupt-controller: Marks the device node as an interrupt controller.
16 - #interrupt-cells: is <2> and their usage is compliant to the 2 cells
17 variant of <../interrupt-controller/interrupts.txt>
19 are defined at dt-bindings/mfd/max77620.h.
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| /Documentation/admin-guide/pm/ |
| D | sleep-states.rst | 1 .. SPDX-License-Identifier: GPL-2.0
13 Sleep states are global low-power states of the entire system in which user
28 Suspend-to-Idle
29 ---------------
31 This is a generic, pure software, light-weight variant of system suspend (also
34 I/O devices into low-power states (possibly lower-power than available in the
38 The system is woken up from this state by in-band interrupts, so theoretically
43 or :ref:`suspend-to-RAM <s2ram>`, or it can be used in addition to any of the
50 -------
54 operating state is lost (the system core logic retains power), so the system can
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| /Documentation/devicetree/bindings/power/reset/ |
| D | gpio-poweroff.txt | 1 Driver a GPIO line that can be used to turn the power off.
3 The driver supports both level triggered and edge triggered power off.
5 install a handler to power off the system. If the optional properties
9 When the power-off handler is called, the gpio is configured as an
10 output, and drive active, so triggering a level triggered power off
11 condition. This will also cause an inactive->active edge condition, so
12 triggering positive edge triggered power off. After a delay of 100ms,
13 the GPIO is set to inactive, thus causing an active->inactive edge,
14 triggering negative edge triggered power off. After another 100ms
15 delay the GPIO is driver active again. If the power is still on and
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| /Documentation/devicetree/bindings/leds/ |
| D | leds-bcm6358.txt | 5 which can either be controlled by software (exporting the 74x164 as spi-gpio.
6 See Documentation/devicetree/bindings/gpio/gpio-74x164.txt), or
10 - compatible : should be "brcm,bcm6358-leds".
11 - #address-cells : must be 1.
12 - #size-cells : must be 0.
13 - reg : BCM6358 LED controller address and size.
16 - brcm,clk-div : SCK signal divider. Possible values are 1, 2, 4 and 8.
18 - brcm,clk-dat-low : Boolean, makes clock and data signals active low.
21 Each LED is represented as a sub-node of the brcm,bcm6358-leds device.
23 LED sub-node required properties:
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | pincfg-node.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/pincfg-node.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
21 bias-disable:
25 bias-high-impedance:
27 description: high impedance mode ("third-state", "floating")
29 bias-bus-hold:
33 bias-pull-up:
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| /Documentation/devicetree/bindings/power/supply/ |
| D | max8903-charger.txt | 4 - compatible: "maxim,max8903" for MAX8903 Battery Charger
5 - dok-gpios: Valid DC power has been detected (active low, input), optional if uok-gpios is provided
6 - uok-gpios: Valid USB power has been detected (active low, input), optional if dok-gpios is provid…
9 - cen-gpios: Charge enable pin (active low, output)
10 - chg-gpios: Charger status pin (active low, input)
11 - flt-gpios: Fault pin (active low, output)
12 - dcm-gpios: Current limit mode setting (DC=1 or USB=0, output)
13 - usus-gpios: USB suspend pin (active high, output)
18 max8903-charger {
20 dok-gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
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| /Documentation/devicetree/bindings/clock/ti/ |
| D | dpll.txt | 3 Binding status: Unstable - ABI compatibility may be broken in the future
6 register-mapped DPLL with usually two selectable input clocks
10 modes (locked, low power stop etc.) This binding has several
11 sub-types, which effectively result in slightly different setup
14 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
17 - compatible : shall be one of:
18 "ti,omap3-dpll-clock",
19 "ti,omap3-dpll-core-clock",
20 "ti,omap3-dpll-per-clock",
21 "ti,omap3-dpll-per-j-type-clock",
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| /Documentation/devicetree/bindings/arm/tegra/ |
| D | nvidia,tegra186-pmc.txt | 1 NVIDIA Tegra Power Management Controller (PMC)
4 - compatible: Should contain one of the following:
5 - "nvidia,tegra186-pmc": for Tegra186
6 - "nvidia,tegra194-pmc": for Tegra194
7 - "nvidia,tegra234-pmc": for Tegra234
8 - reg: Must contain an (offset, length) pair of the register set for each
9 entry in reg-names.
10 - reg-names: Must include the following entries:
11 - "pmc"
12 - "wake"
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| /Documentation/driver-api/pm/ |
| D | devices.rst | 1 .. SPDX-License-Identifier: GPL-2.0
7 Device Power Management Basics
10 :Copyright: |copy| 2010-2011 Rafael J. Wysocki <rjw@sisk.pl>, Novell Inc.
17 Most of the code in Linux is device drivers, so most of the Linux power
18 management (PM) code is also driver-specific. Most drivers will do very
22 This writeup gives an overview of how drivers interact with system-wide
23 power management goals, emphasizing the models and interfaces that are
25 background for the domain-specific work you'd do with any specific driver.
28 Two Models for Device Power Management
31 Drivers will use one or both of these models to put devices into low-power
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| /Documentation/devicetree/bindings/sound/ |
| D | ti,pcm3168a.txt | 7 - compatible: "ti,pcm3168a"
9 - clocks : Contains an entry for each entry in clock-names
11 - clock-names : Includes the following entries:
14 - VDD1-supply : Digital power supply regulator 1 (+3.3V)
16 - VDD2-supply : Digital power supply regulator 2 (+3.3V)
18 - VCCAD1-supply : ADC power supply regulator 1 (+5V)
20 - VCCAD2-supply : ADC power supply regulator 2 (+5V)
22 - VCCDA1-supply : DAC power supply regulator 1 (+5V)
24 - VCCDA2-supply : DAC power supply regulator 2 (+5V)
30 - reset-gpios : Optional reset gpio line connected to RST pin of the codec.
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| /Documentation/power/ |
| D | pci.rst | 2 PCI Power Management
7 An overview of concepts and the Linux kernel's interfaces related to PCI power
11 This document only covers the aspects of power management specific to PCI
13 power management refer to Documentation/driver-api/pm/devices.rst and
14 Documentation/power/runtime_pm.rst.
18 1. Hardware and Platform Support for PCI Power Management
19 2. PCI Subsystem and Device Power Management
20 3. PCI Device Drivers and Power Management
24 1. Hardware and Platform Support for PCI Power Management
27 1.1. Native and Platform-Based Power Management
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| /Documentation/arm/pxa/ |
| D | mfp.rst | 7 MFP stands for Multi-Function Pin, which is the pin-mux logic on PXA3xx and
15 mechanism is introduced from PXA3xx to completely move the pin-mux functions
16 out of the GPIO controller. In addition to pin-mux configurations, the MFP
17 also controls the low power state, driving strength, pull-up/down and event
21 +--------+
22 | |--(GPIO19)--+
24 | |--(GPIO...) |
25 +--------+ |
26 | +---------+
27 +--------+ +------>| |
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| /Documentation/devicetree/bindings/arm/msm/ |
| D | qcom,idle-state.txt | 3 ARM provides idle-state node to define the cpuidle states, as defined in [1].
4 cpuidle-qcom is the cpuidle driver for Qualcomm SoCs and uses these idle
6 The idle states supported by the QCOM SoC are defined as -
10 * Standalone Power Collapse (Standalone PC or SPC)
11 * Power Collapse (PC)
26 Retention: Retention is a low power state where the core is clock gated and
33 Standalone PC: A cpu can power down and warmboot if there is a sufficient time
35 to indicate a core entering a power down state without consulting any other
36 cpu or the system resources. This helps save power only on that core. The SPM
37 sequence for this idle state is programmed to power down the supply to the
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| D | qcom,saw2.txt | 3 The SAW2 is a wrapper around the Subsystem Power Manager (SPM) and the
5 power-controller that transitions a piece of hardware (like a processor or
6 subsystem) into and out of low power modes via a direct connection to
8 system, notifying them when a low power state is entered or exited.
21 - compatible:
27 "qcom,apq8064-saw2-v1.1-cpu"
28 "qcom,msm8974-saw2-v2.1-cpu"
29 "qcom,apq8084-saw2-v2.1-cpu"
31 - reg:
33 Value type: <prop-encoded-array>
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| /Documentation/devicetree/bindings/net/ |
| D | sff,sfp.txt | 1 Small Form Factor (SFF) Committee Small Form-factor Pluggable (SFP)
6 - compatible : must be one of
10 - i2c-bus : phandle of an I2C bus controller for the SFP two wire serial
15 - mod-def0-gpios : GPIO phandle and a specifier of the MOD-DEF0 (AKA Mod_ABS)
19 - los-gpios : GPIO phandle and a specifier of the Receiver Loss of Signal
22 - tx-fault-gpios : GPIO phandle and a specifier of the Module Transmitter
25 - tx-disable-gpios : GPIO phandle and a specifier of the Transmitter Disable
28 - rate-select0-gpios : GPIO phandle and a specifier of the Rx Signaling Rate
29 Select (AKA RS0) output gpio signal, low: low Rx rate, high: high Rx rate
32 - rate-select1-gpios : GPIO phandle and a specifier of the Tx Signaling Rate
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| /Documentation/devicetree/bindings/leds/irled/ |
| D | spi-ir-led.txt | 8 - compatible: should be "ir-spi-led".
11 - duty-cycle: 8 bit value that represents the percentage of one period
13 - led-active-low: boolean value that specifies whether the output is
15 - power-supply: specifies the power source. It can either be a regulator
16 or a gpio which enables a regulator, i.e. a regulator-fixed as
18 Documentation/devicetree/bindings/regulator/fixed-regulator.yaml
23 compatible = "ir-spi-led";
25 spi-max-frequency = <5000000>;
26 power-supply = <&vdd_led>;
27 led-active-low;
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| /Documentation/devicetree/bindings/powerpc/ |
| D | sleep.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
13 Devices on SOCs often have mechanisms for placing devices into low-power
15 this information is more complicated than a cell-index property can
21 controller-specific sleep specifier of zero or more cells.
23 The semantics of what type of low power modes are possible are defined
24 by the sleep controller. Some examples of the types of low power modes
27 - Dynamic: The device may be disabled or enabled at any time.
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| /Documentation/devicetree/bindings/iio/frequency/ |
| D | adf4350.txt | 4 - compatible: Should be one of
7 - reg: SPI chip select numbert for the device
8 - spi-max-frequency: Max SPI frequency to use (< 20000000)
9 - clocks: From common clock binding. Clock is phandle to clock for
13 - gpios: GPIO Lock detect - If set with a valid phandle and GPIO number,
15 - adi,channel-spacing: Channel spacing in Hz (influences MODULUS).
16 - adi,power-up-frequency: If set in Hz the PLL tunes to
18 - adi,reference-div-factor: If set the driver skips dynamic calculation
20 - adi,reference-doubler-enable: Enables reference doubler.
21 - adi,reference-div2-enable: Enables reference divider.
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