| /Documentation/devicetree/bindings/net/ |
| D | brcm,unimac-mdio.txt | 1 * Broadcom UniMAC MDIO bus controller
4 - compatible: should one from "brcm,genet-mdio-v1", "brcm,genet-mdio-v2",
5 "brcm,genet-mdio-v3", "brcm,genet-mdio-v4", "brcm,genet-mdio-v5" or
6 "brcm,unimac-mdio"
9 larger than 16-bits MDIO transactions
10 - reg-names: name(s) of the register must be "mdio" and optional "mdio_indir_rw"
16 Ethernet switch this MDIO block is integrated from, or must be two, if there
17 are two separate interrupts, first one must be "mdio done" and second must be
18 for "mdio error"
22 - clocks: A reference to the clock supplying the MDIO bus controller
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| D | mdio-mux-multiplexer.txt | 1 Properties for an MDIO bus multiplexer consumer device
3 This is a special case of MDIO mux when MDIO mux is defined as a consumer
7 Required properties in addition to the MDIO Bus multiplexer properties:
11 - mdio-parent-bus : phandle to the parent MDIO bus.
13 each child node of mdio bus multiplexer consumer device represent a mdio
18 and Documentation/devicetree/bindings/net/mdio-mux.txt
38 mdio-mux-1 { // Mux consumer
39 compatible = "mdio-mux-multiplexer";
41 mdio-parent-bus = <&emdio1>;
45 mdio@0 {
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| D | hisilicon-hns-mdio.txt | 1 Hisilicon MDIO bus controller
5 "hisilicon,hns-mdio"
6 "hisilicon,mdio"
7 "hisilicon,hns-mdio" is recommended to be used for hip05 and later SOCs,
8 while "hisilicon,mdio" is optional for backwards compatibility only on
10 - reg: The base address of the MDIO bus controller register bank.
12 - #size-cells: Must be <0>. MDIO addresses have no size component.
14 Typically an MDIO bus might have several children.
17 mdio@803c0000 {
20 compatible = "hisilicon,hns-mdio","hisilicon,mdio";
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| D | cavium-mdio.txt | 1 * System Management Interface (SMI) / MDIO
6 "cavium,octeon-3860-mdio": Compatibility with all cn3XXX, cn5XXX
9 "cavium,thunder-8890-mdio": Compatibility with all cn8XXX SOCs.
11 - reg: The base address of the MDIO bus controller register bank.
15 - #size-cells: Must be <0>. MDIO addresses have no size component.
17 Typically an MDIO bus might have several children.
20 mdio@1180000001800 {
21 compatible = "cavium,octeon-3860-mdio";
33 * System Management Interface (SMI) / MDIO Nexus
35 Several mdio buses may be gathered as children of a single PCI
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| D | marvell-orion-mdio.txt | 1 * Marvell MDIO Ethernet Controller interface
5 identical unit that provides an interface with the MDIO bus.
11 - compatible: "marvell,orion-mdio" or "marvell,xmdio"
12 - reg: address and length of the MDIO registers. When an interrupt is
19 - clocks: phandle for up to four required clocks for the MDIO instance
21 The child nodes of the MDIO driver are the individual PHY devices
22 connected to this MDIO bus. They must have a "reg" property given the
23 PHY address on the MDIO bus.
27 mdio {
30 compatible = "marvell,orion-mdio";
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| D | brcm,mdio-mux-iproc.txt | 1 Properties for an MDIO bus multiplexer found in Broadcom iProc based SoCs.
3 This MDIO bus multiplexer defines buses that could be internal as well as
4 external to SoCs and could accept MDIO transaction compatible to C-22 or
6 properties as well to generate desired MDIO transaction on appropriate bus.
10 MDIO multiplexer node:
11 - compatible: brcm,mdio-mux-iproc.
17 - clocks: phandle of the core clock which drives the mdio block.
20 at- Documentation/devicetree/bindings/net/mdio-mux.txt
24 mdio_mux_iproc: mdio-mux@66020000 {
25 compatible = "brcm,mdio-mux-iproc";
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| D | allwinner,sun8i-a83t-emac.yaml | 121 mdio-mux:
126 const: allwinner,sun8i-h3-mdio-mux
128 mdio-parent-bus:
131 Phandle to EMAC MDIO.
133 mdio@1:
135 description: Internal MDIO Bus
145 const: allwinner,sun8i-h3-mdio-internal
168 mdio@2:
170 description: External MDIO Bus (H3 only)
184 - mdio-parent-bus
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| D | mdio-gpio.txt | 1 MDIO on GPIOs
4 - virtual,gpio-mdio
6 MDC and MDIO lines connected to GPIO controllers are listed in the
9 MDC, MDIO.
11 Note: Each gpio-mdio bus should have an alias correctly numbered in "aliases"
17 mdio-gpio0 = &mdio0;
20 mdio0: mdio {
21 compatible = "virtual,mdio-gpio";
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| D | apm-xgene-mdio.txt | 1 APM X-Gene SoC MDIO node
3 MDIO node is defined to describe on-chip MDIO controller.
6 - compatible: Must be "apm,xgene-mdio-rgmii" or "apm,xgene-mdio-xfi"
12 For the phys on the mdio bus, there must be a node with the following fields:
18 mdio: mdio@17020000 {
19 compatible = "apm,xgene-mdio-rgmii";
27 &mdio {
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| D | mdio-mux-mmioreg.txt | 1 Properties for an MDIO bus multiplexer controlled by a memory-mapped device
3 This is a special case of a MDIO bus multiplexer. A memory-mapped device,
4 like an FPGA, is used to control which child bus is connected. The mdio-mux
10 - compatible : string, must contain "mdio-mux-mmioreg"
18 'reg' property of each child mdio-mux node must be constrained by
24 For the "EMI2" MDIO bus, register 9 (BRDCFG1) controls the mux on that bus.
36 mdio-mux-emi2 {
37 compatible = "mdio-mux-mmioreg", "mdio-mux";
38 mdio-parent-bus = <&xmdio0>;
44 emi2_slot1: mdio@0 { // Slot 1 XAUI (FM2)
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| D | fsl-enetc.txt | 14 1. The ENETC external port is connected to a MDIO configurable phy
16 1.1. Using the local ENETC Port MDIO interface
18 In this case, the ENETC node should include a "mdio" sub-node
26 - phy-handle : Phandle to a PHY on the MDIO bus.
31 - mdio : "mdio" node, defined in mdio.txt.
43 mdio {
52 1.2. Using the central MDIO PCIe endpoint device
54 In this case, the mdio node should be defined as another PCIe
62 - compatible : Should be "fsl,enetc-mdio".
64 The remaining required mdio bus properties are standard, their bindings
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| D | aspeed,ast2600-mdio.yaml | 4 $id: http://devicetree.org/schemas/net/aspeed,ast2600-mdio.yaml#
7 title: ASPEED AST2600 MDIO Controller
13 The ASPEED AST2600 MDIO controller is the third iteration of ASPEED's MDIO
18 - $ref: "mdio.yaml#"
22 const: aspeed,ast2600-mdio
25 description: The register range of the MDIO controller instance
37 mdio0: mdio@1e650000 {
38 compatible = "aspeed,ast2600-mdio";
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| D | mdio-mux-meson-g12a.txt | 1 Properties for the MDIO bus multiplexer/glue of Amlogic G12a SoC family.
3 This is a special case of a MDIO bus multiplexer. It allows to choose between
4 the internal mdio bus leading to the embedded 10/100 PHY or the external
5 MDIO bus.
8 - compatible : amlogic,g12a-mdio-mux
18 mdio_mux: mdio-multiplexer@4c000 {
19 compatible = "amlogic,g12a-mdio-mux";
25 mdio-parent-bus = <&mdio0>;
29 ext_mdio: mdio@0 {
35 int_mdio: mdio@1 {
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| D | ti,davinci-mdio.yaml | 4 $id: http://devicetree.org/schemas/net/ti,davinci-mdio.yaml#
7 title: TI SoC Davinci/Keystone2 MDIO Controller
13 TI SoC Davinci/Keystone2 MDIO Controller
16 - $ref: "mdio.yaml#"
26 - const: ti,cpsw-mdio
29 - const: ti,am4372-mdio
30 - const: ti,cpsw-mdio
38 description: MDIO Bus frequency
65 davinci_mdio: mdio@4a101000 {
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| D | mdio.yaml | 4 $id: http://devicetree.org/schemas/net/mdio.yaml#
7 title: MDIO Bus Generic Binding
15 These are generic properties that can apply to any MDIO bus. Any
16 MDIO bus must have a list of child nodes, one per device on the
22 pattern: "^mdio(@.*)?"
34 lines of all devices on that MDIO bus.
38 RESET pulse width in microseconds. It applies to all MDIO devices
44 Delay after reset deassert in microseconds. It applies to all MDIO
51 Desired MDIO bus clock frequency in Hz. Values greater than IEEE 802.3
75 If set, indicates the MDIO device does not correctly release
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| D | brcm,bcmgenet.txt | 28 when operating in a RGMII to RGMII type of connection, or when the MDIO bus is
35 - mdio bus node: this node should always be present regardless of the PHY
38 MDIO bus node required properties:
40 - compatible: should contain one of "brcm,genet-mdio-v1", "brcm,genet-mdio-v2"
41 "brcm,genet-mdio-v3", "brcm,genet-mdio-v4", "brcm,genet-mdio-v5", the version
43 with brcm,genet-mdio-v4)
45 - #address-cells: address cell for MDIO bus addressing, should be 1
46 - #size-cells: size of the cells for MDIO bus addressing, should be 0
65 mdio@e14 {
66 compatible = "brcm,genet-mdio-v4";
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| D | fsl-tsec-phy.txt | 1 * MDIO IO device
3 The MDIO is a bus to which the PHY devices are connected. For each
15 mdio. Currently supported strings/devices are:
17 - "fsl,gianfar-mdio"
19 - "fsl,etsec2-mdio"
20 - "fsl,ucc-mdio"
21 - "fsl,fman-mdio"
22 When device_type is "mdio", the following strings are also considered:
28 mdio@24520 {
30 compatible = "fsl,gianfar-mdio";
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| D | brcm,iproc-mdio.txt | 1 * Broadcom iProc MDIO bus controller
4 - compatible: should be "brcm,iproc-mdio"
5 - reg: address and length of the register set for the MDIO interface
9 Child nodes of this MDIO bus controller node are standard Ethernet PHY device
14 mdio@18002000 {
15 compatible = "brcm,iproc-mdio";
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| D | allwinner,sun4i-a10-mdio.yaml | 4 $id: http://devicetree.org/schemas/net/allwinner,sun4i-a10-mdio.yaml#
7 title: Allwinner A10 MDIO Controller Device Tree Bindings
14 - $ref: "mdio.yaml#"
24 - allwinner,sun4i-a10-mdio
27 - allwinner,sun4i-mdio
40 const: allwinner,sun4i-a10-mdio
56 mdio@1c0b080 {
57 compatible = "allwinner,sun4i-a10-mdio";
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| D | qcom,ipq8064-mdio.yaml | 4 $id: http://devicetree.org/schemas/net/qcom,ipq8064-mdio.yaml#
7 title: Qualcomm ipq806x MDIO bus controller
13 The ipq806x soc have a MDIO dedicated controller that is
17 - $ref: "mdio.yaml#"
21 const: qcom,ipq8064-mdio
42 mdio0: mdio@37000000 {
46 compatible = "qcom,ipq8064-mdio";
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| /Documentation/devicetree/bindings/net/dsa/ |
| D | realtek-smi.txt | 5 bit-banged GPIO that while it reuses the MDIO lines MCK and MDIO does
6 not use the MDIO protocol. This binding defines how to specify the
23 - mdio-gpios: GPIO line for the MDIO data line.
48 - mdio
50 This defines the internal MDIO bus of the SMI device, mostly for the
54 Required properties of mdio:
56 - compatible: should be set to "realtek,smi-mdio" for all SMI devices
58 See net/mdio.txt for additional MDIO bus properties.
67 /* 22 = MDIO (has input reads), 21 = MDC (clock, output only) */
69 mdio-gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
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| D | marvell.txt | 10 Marvell Switches are MDIO devices. The following properties should be
11 placed as a child node of an mdio device.
17 which is at a different MDIO base address in different switch families.
44 - mdio : Container of PHY and devices on the switches MDIO
46 - mdio? : Container of PHYs and devices on the external MDIO
48 "marvell,mv88e6xxx-mdio-external"
52 mdio {
65 mdio {
77 mdio {
90 mdio {
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| /Documentation/devicetree/bindings/phy/ |
| D | brcm,mdio-mux-bus-pci.txt | 4 - reg: MDIO Bus number for the MDIO interface
10 - reg: MDIO Phy ID for the MDIO interface
13 This is a child bus node of "brcm,mdio-mux-iproc" node.
17 mdio@0 {
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| /Documentation/ABI/testing/ |
| D | sysfs-bus-mdio | 7 MDIO bus address statistics.
14 Total number of transfers for this MDIO bus.
21 Total number of transfer errors for this MDIO bus.
28 Total number of write transactions for this MDIO bus.
35 Total number of read transactions for this MDIO bus.
42 Total number of transfers for this MDIO bus address.
49 Total number of transfer errors for this MDIO bus address.
56 Total number of write transactions for this MDIO bus address.
63 Total number of read transactions for this MDIO bus address.
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| /Documentation/devicetree/bindings/soc/fsl/cpm_qe/ |
| D | network.txt | 23 * MDIO
26 fsl,pq1-fec-mdio (reg is same as first resource of FEC device)
27 fsl,cpm2-mdio-bitbang (reg is port C registers)
29 Properties for fsl,cpm2-mdio-bitbang:
30 fsl,mdio-pin : pin of port C controlling mdio data
31 fsl,mdc-pin : pin of port C controlling mdio clock
34 mdio@10d40 {
35 compatible = "fsl,mpc8272ads-mdio-bitbang",
36 "fsl,mpc8272-mdio-bitbang",
37 "fsl,cpm2-mdio-bitbang";
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