| /Documentation/devicetree/bindings/pinctrl/ |
| D | pinctrl-single.txt | 1 One-register-per-pin type device tree based pinctrl driver
4 - compatible : "pinctrl-single" or "pinconf-single".
5 "pinctrl-single" means that pinconf isn't supported.
10 - #pinctrl-cells : number of cells in addition to the index, set to 1
11 for pinctrl-single,pins and 2 for pinctrl-single,bits
13 - pinctrl-single,register-width : pinmux register access width in bits
15 - pinctrl-single,function-mask : mask of allowed pinmux function bits
19 - pinctrl-single,function-off : function off mode for disabled state if
23 - pinctrl-single,bit-per-mux : boolean to indicate that one register controls
24 more than one pin, for which "pinctrl-single,function-mask" property specifies
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| D | allwinner,sun4i-a10-pinctrl.yaml | 4 $id: http://devicetree.org/schemas/pinctrl/allwinner,sun4i-a10-pinctrl.yaml#
30 - allwinner,sun4i-a10-pinctrl
31 - allwinner,sun5i-a10s-pinctrl
32 - allwinner,sun5i-a13-pinctrl
33 - allwinner,sun6i-a31-pinctrl
34 - allwinner,sun6i-a31-r-pinctrl
35 - allwinner,sun6i-a31s-pinctrl
36 - allwinner,sun7i-a20-pinctrl
37 - allwinner,sun8i-a23-pinctrl
38 - allwinner,sun8i-a23-r-pinctrl
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| D | socionext,uniphier-pinctrl.yaml | 4 $id: http://devicetree.org/schemas/pinctrl/socionext,uniphier-pinctrl.yaml#
14 pattern: "pinctrl"
18 - socionext,uniphier-ld4-pinctrl
19 - socionext,uniphier-pro4-pinctrl
20 - socionext,uniphier-sld8-pinctrl
21 - socionext,uniphier-pro5-pinctrl
22 - socionext,uniphier-pxs2-pinctrl
23 - socionext,uniphier-ld6b-pinctrl
24 - socionext,uniphier-ld11-pinctrl
25 - socionext,uniphier-ld20-pinctrl
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| D | ti,omap-pinctrl.txt | 1 OMAP Pinctrl definitions
5 "ti,omap2420-padconf" - OMAP2420 compatible pinctrl
6 "ti,omap2430-padconf" - OMAP2430 compatible pinctrl
7 "ti,omap3-padconf" - OMAP3 compatible pinctrl
8 "ti,omap4-padconf" - OMAP4 compatible pinctrl
9 "ti,omap5-padconf" - OMAP5 compatible pinctrl
10 "ti,dra7-padconf" - DRA7 compatible pinctrl
11 "ti,am437-padconf" - AM437x compatible pinctrl
13 See Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt for further details.
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| D | berlin,pinctrl.txt | 18 "marvell,berlin2-soc-pinctrl",
19 "marvell,berlin2-system-pinctrl",
20 "marvell,berlin2cd-soc-pinctrl",
21 "marvell,berlin2cd-system-pinctrl",
22 "marvell,berlin2q-soc-pinctrl",
23 "marvell,berlin2q-system-pinctrl",
24 "marvell,berlin4ct-avio-pinctrl",
25 "marvell,berlin4ct-soc-pinctrl",
26 "marvell,berlin4ct-system-pinctrl",
27 "syna,as370-soc-pinctrl"
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| D | meson,pinctrl.txt | 4 - compatible: one of "amlogic,meson8-cbus-pinctrl"
5 "amlogic,meson8b-cbus-pinctrl"
6 "amlogic,meson8m2-cbus-pinctrl"
7 "amlogic,meson8-aobus-pinctrl"
8 "amlogic,meson8b-aobus-pinctrl"
9 "amlogic,meson8m2-aobus-pinctrl"
10 "amlogic,meson-gxbb-periphs-pinctrl"
11 "amlogic,meson-gxbb-aobus-pinctrl"
12 "amlogic,meson-gxl-periphs-pinctrl"
13 "amlogic,meson-gxl-aobus-pinctrl"
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| D | pinctrl-mt65xx.txt | 7 "mediatek,mt2701-pinctrl", compatible with mt2701 pinctrl.
8 "mediatek,mt2712-pinctrl", compatible with mt2712 pinctrl.
9 "mediatek,mt6397-pinctrl", compatible with mt6397 pinctrl.
10 "mediatek,mt7623-pinctrl", compatible with mt7623 pinctrl.
11 "mediatek,mt8127-pinctrl", compatible with mt8127 pinctrl.
12 "mediatek,mt8135-pinctrl", compatible with mt8135 pinctrl.
13 "mediatek,mt8167-pinctrl", compatible with mt8167 pinctrl.
14 "mediatek,mt8173-pinctrl", compatible with mt8173 pinctrl.
15 "mediatek,mt8516-pinctrl", compatible with mt8516 pinctrl.
42 Please refer to pinctrl-bindings.txt in this directory for details of the
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| D | marvell,mvebu-pinctrl.txt | 1 * Marvell SoC pinctrl core driver for mpp
3 The pinctrl driver enables Marvell SoCs to configure the multi-purpose pins
7 Please refer to pinctrl-bindings.txt in this directory for details of the
8 common pinctrl bindings used by client devices, including the meaning of the
15 Required properties for pinctrl driver:
16 - compatible: "marvell,<soc>-pinctrl"
17 Please refer to each marvell,<soc>-pinctrl.txt binding doc for supported SoCs.
23 common for all marvell,pins. Please refer to marvell,<soc>-pinctrl.txt for
34 pinctrl-0 = <&pmx_uart1_sw>;
35 pinctrl-names = "default";
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| D | cortina,gemini-pinctrl.txt | 10 - compatible: "cortina,gemini-pinctrl"
15 Please refer to pinctrl-bindings.txt for generic pin multiplexing nodes
30 pinctrl {
31 compatible = "cortina,gemini-pinctrl";
32 pinctrl-names = "default";
33 pinctrl-0 = <&dram_default_pins>, <&system_default_pins>,
36 dram_default_pins: pinctrl-dram {
42 rtc_default_pins: pinctrl-rtc {
48 power_default_pins: pinctrl-power {
54 system_default_pins: pinctrl-system {
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| D | pinctrl-rk805.txt | 5 Please refer file <devicetree/bindings/pinctrl/pinctrl-bindings.txt>
6 for details of the common pinctrl bindings used by client devices,
13 - pinctrl-names: A pinctrl state named per <pinctrl-bindings.txt>.
14 - pinctrl[0...n]: Properties to contain the phandle for pinctrl states per
15 <pinctrl-bindings.txt>.
17 The pin configurations are defined as child of the pinctrl states node. Each
35 <pinctrl-bindings.txt>. Absence of properties will leave the configuration
53 pinctrl-names = "default";
54 pinctrl-0 = <&pmic_int_l>, <&rk805_default>;
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| D | rockchip,pinctrl.txt | 8 Please refer to pinctrl-bindings.txt in this directory for details of the
9 common pinctrl bindings used by client devices, including the meaning of the
23 "rockchip,px30-pinctrl": for Rockchip PX30
24 "rockchip,rv1108-pinctrl": for Rockchip RV1108
25 "rockchip,rk2928-pinctrl": for Rockchip RK2928
26 "rockchip,rk3066a-pinctrl": for Rockchip RK3066a
27 "rockchip,rk3066b-pinctrl": for Rockchip RK3066b
28 "rockchip,rk3128-pinctrl": for Rockchip RK3128
29 "rockchip,rk3188-pinctrl": for Rockchip RK3188
30 "rockchip,rk3228-pinctrl": for Rockchip RK3228
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| D | ingenic,pinctrl.yaml | 4 $id: http://devicetree.org/schemas/pinctrl/ingenic,pinctrl.yaml#
10 Please refer to pinctrl-bindings.txt in this directory for details of the
11 common pinctrl bindings used by client devices, including the meaning of the
30 pattern: "^pinctrl@[0-9a-f]+$"
35 - ingenic,jz4740-pinctrl
36 - ingenic,jz4725b-pinctrl
37 - ingenic,jz4760-pinctrl
38 - ingenic,jz4770-pinctrl
39 - ingenic,jz4780-pinctrl
40 - ingenic,x1000-pinctrl
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| D | pinctrl-atlas7.txt | 5 - reg : Address range of the pinctrl registers
7 For example, pinctrl might have properties like the following:
8 pinctrl: ioc@18880000 {
60 Please refer to pinctrl-bindings.txt in this directory for details of the common
61 pinctrl bindings used by client devices.
73 drivers/pinctrl/pinctrl-sirf.c
75 For example, pinctrl might have subnodes like the following:
100 pinctrl-names = "default";
101 pinctrl-0 = <&sd1_pmx0>;
107 pinctrl-names = "default";
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| D | renesas,rza2-pinctrl.yaml | 4 $id: http://devicetree.org/schemas/pinctrl/renesas,rza2-pinctrl.yaml#
23 const: "renesas,r7s9210-pinctrl" # RZ/A2M
34 RZA2_PIN() helper macro in r7s9210-pinctrl.h.
56 located in include/dt-bindings/pinctrl/r7s9210-pinctrl.h to easily
68 helper macro in r7s9210-pinctrl.h.
86 #include <dt-bindings/pinctrl/r7s9210-pinctrl.h>
87 pinctrl: pinctrl@fcffe000 {
88 compatible = "renesas,r7s9210-pinctrl";
93 gpio-ranges = <&pinctrl 0 0 176>;
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| D | st,stm32-pinctrl.yaml | 5 $id: http://devicetree.org/schemas/pinctrl/st,stm32-pinctrl.yaml#
22 - st,stm32f429-pinctrl
23 - st,stm32f469-pinctrl
24 - st,stm32f746-pinctrl
25 - st,stm32f769-pinctrl
26 - st,stm32h743-pinctrl
27 - st,stm32mp157-pinctrl
28 - st,stm32mp157-z-pinctrl
52 More details in include/dt-bindings/pinctrl/stm32-pinfunc.h
119 A pinctrl node should contain at least one subnode representing the
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| D | cnxt,cx92755-pinctrl.txt | 11 - compatible: Must be "cnxt,cx92755-pinctrl"
21 pinctrl: pinctrl@f0000e20 {
22 compatible = "cnxt,cx92755-pinctrl";
40 Please refer to the pinctrl-bindings.txt in this directory for details of the
41 common pinctrl bindings used by client devices, including the definition of a
53 details generic pin config properties, please refer to pinctrl-bindings.txt
54 and <include/linux/pinctrl/pinconfig-generic.h>.
65 pinctrl: pinctrl@f0000e20 {
66 compatible = "cnxt,cx92755-pinctrl";
80 pinctrl-0 = <&uart0_default>;
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| D | pinctrl-sirf.txt | 4 - compatible : "sirf,prima2-pinctrl"
5 - reg : Address range of the pinctrl registers
13 Please refer to pinctrl-bindings.txt in this directory for details of the common
14 pinctrl bindings used by client devices.
26 drivers/pinctrl/pinctrl-sirf.c
28 For example, pinctrl might have subnodes like the following:
45 pinctrl-names = "default";
46 pinctrl-0 = <&uart2_noflow_pins_a>;
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| D | pinctrl-vt8500.txt | 7 - compatible: "via,vt8500-pinctrl", "wm,wm8505-pinctrl", "wm,wm8650-pinctrl",
8 "wm8750-pinctrl" or "wm,wm8850-pinctrl"
19 Please refer to pinctrl-bindings.txt in this directory for details of the
20 common pinctrl bindings used by client devices, including the meaning of the
50 pinctrl: pinctrl {
51 compatible = "wm,wm8505-pinctrl";
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| /Documentation/devicetree/bindings/i2c/ |
| D | i2c-mux-pinctrl.txt | 1 Pinctrl-based I2C Bus Mux
5 using the pinctrl device tree bindings.
22 - compatible: i2c-mux-pinctrl
28 * Standard pinctrl properties that specify the pin mux state for each child
29 bus. See ../pinctrl/pinctrl-bindings.txt.
35 For each named state defined in the pinctrl-names property, an I2C child bus
37 the pinctrl-names property.
40 such a state is defined, it must be the last entry in pinctrl-names. For
43 pinctrl-names = "ddc", "pta", "idle" -> ddc = bus 0, pta = bus 1
44 pinctrl-names = "ddc", "idle", "pta" -> Invalid ("idle" not last)
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| /Documentation/devicetree/bindings/input/touchscreen/ |
| D | colibri-vf50-ts.txt | 11 - pinctrl-names: "idle", "default", "gpios"
12 - pinctrl-0: pinctrl node for pen/touch detection state pinmux
13 - pinctrl-1: pinctrl node for X/Y and pressure measurement (ADC) state pinmux
14 - pinctrl-2: pinctrl node for gpios functioning as FET gate drivers
29 pinctrl-names = "idle","default","gpios";
30 pinctrl-0 = <&pinctrl_touchctrl_idle>;
31 pinctrl-1 = <&pinctrl_touchctrl_default>;
32 pinctrl-2 = <&pinctrl_touchctrl_gpios>;
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| D | sis_i2c.txt | 10 - pinctrl-names: should be "default" (see pinctrl binding [1]).
11 - pinctrl-0: a phandle pointing to the pin settings for the
12 device (see pinctrl binding [1]).
18 [1]: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
25 pinctrl-names = "default";
26 pinctrl-0 = <&pinctrl_sis>;
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| /Documentation/devicetree/bindings/serial/ |
| D | microchip,pic32-uart.txt | 9 - pinctrl-names: A pinctrl state names "default" must be defined.
10 - pinctrl-0: Phandle referencing pin configuration of the UART peripheral.
11 See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
24 pinctrl-names = "default";
25 pinctrl-0 = <&pinctrl_uart1
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| /Documentation/devicetree/bindings/pwm/ |
| D | nvidia,tegra20-pwm.txt | 27 state of the system. The configuration of pin is provided via the pinctrl
28 DT node as detailed in the pinctrl DT binding document
29 Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
32 pinctrl-names: Pin state names. Must be "default" and "sleep".
33 pinctrl-0: phandle for the default/active state of pin configurations.
34 pinctrl-1: phandle for the sleep state of pin configurations.
54 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
74 pinctrl-names = "default", "sleep";
75 pinctrl-0 = <&pwm_active_state>;
76 pinctrl-1 = <&pwm_sleep_state>;
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| /Documentation/devicetree/bindings/mmc/ |
| D | microchip,sdhci-pic32.txt | 13 - pinctrl-names: A pinctrl state names "default" must be defined.
14 - pinctrl-0: Phandle referencing pin configuration of the SDHCI controller.
15 See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
27 pinctrl-names = "default";
28 pinctrl-0 = <&pinctrl_sdhc1>;
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| /Documentation/devicetree/bindings/net/ |
| D | microchip,enc28j60.txt | 15 - pinctrl-names: List of assigned state names, see pinctrl binding documentation.
16 - pinctrl-0: List of phandles to configure the GPIO pin used as interrupt line,
17 see also generic and your platform specific pinctrl binding
32 pinctrl-names = "default";
33 pinctrl-0 = <&spi2_pins_b &spi2_sck_cfg>;
37 pinctrl-names = "default";
38 pinctrl-0 = <&enc28j60_pins>;
46 pinctrl@80018000 {
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