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/Documentation/devicetree/bindings/mfd/
Drohm,bd71847-pmic.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mfd/rohm,bd71847-pmic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ROHM BD71847 and BD71850 Power Management Integrated Circuit bindings
10 - Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
13 BD71847AMWV and BD71850MWV are programmable Power Management ICs for powering
14 single-core, dual-core, and quad-core SoCs such as NXP-i.MX 8M. It is
15 optimized for low BOM cost and compact solution footprint. BD71847MWV and
18 …s://www.rohm.com/products/power-management/power-management-ic-for-system/industrial-consumer-appl…
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Drn5t618.txt3 Ricoh RN5T567/RN5T618/RC5T619 is a power management IC family which
4 integrates 3 to 5 step-down DCDC converters, 7 to 10 low-dropout regulators,
6 The RN5T618/RC5T619 provides additionally a Li-ion battery charger,
11 - compatible: must be one of
15 - reg: the I2C slave address of the device
18 - interrupts: interrupt mapping for IRQ
19 See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
20 - system-power-controller:
21 See Documentation/devicetree/bindings/power/power-controller.txt
23 Sub-nodes:
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Dmax77620.txt1 MAX77620 Power management IC from Maxim Semiconductor.
4 -------------------
5 - compatible: Must be one of
9 - reg: I2C device address.
12 -------------------
13 - interrupts: The interrupt on the parent the controller is
15 - interrupt-controller: Marks the device node as an interrupt controller.
16 - #interrupt-cells: is <2> and their usage is compliant to the 2 cells
17 variant of <../interrupt-controller/interrupts.txt>
18 IRQ numbers for different interrupt source of MAX77620
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Drohm,bd71837-pmic.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mfd/rohm,bd71837-pmic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ROHM BD71837 Power Management Integrated Circuit bindings
10 - Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
13 BD71837MWV is programmable Power Management ICs for powering single-core,
14 dual-core, and quad-core SoCs such as NXP-i.MX 8M. It is optimized for low
17 Datasheet for BD71837 is available at
18 …s://www.rohm.com/products/power-management/power-management-ic-for-system/industrial-consumer-appl…
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Das3722.txt1 * ams AS3722 Power management IC.
4 -------------------
5 - compatible: Must be "ams,as3722".
6 - reg: I2C device address.
7 - interrupt-controller: AS3722 has internal interrupt controller which takes the
8 interrupt request from internal sub-blocks like RTC, regulators, GPIOs as well
10 - #interrupt-cells: Should be set to 2 for IRQ number and flags.
11 The first cell is the IRQ number. IRQ numbers for different interrupt source
12 of AS3722 are defined at dt-bindings/mfd/as3722.h
14 interrupts.txt, using dt-bindings/irq.
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Dmc13xxx.txt1 * Freescale MC13783/MC13892 Power Management Integrated Circuit (PMIC)
4 - compatible : Should be "fsl,mc13783" or "fsl,mc13892"
7 - fsl,mc13xxx-uses-adc : Indicate the ADC is being used
8 - fsl,mc13xxx-uses-codec : Indicate the Audio Codec is being used
9 - fsl,mc13xxx-uses-rtc : Indicate the RTC is being used
10 - fsl,mc13xxx-uses-touch : Indicate the touchscreen controller is being used
12 Sub-nodes:
13 - codec: Contain the Audio Codec node.
14 - adc-port: Contain PMIC SSI port number used for ADC.
15 - dac-port: Contain PMIC SSI port number used for DAC.
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/Documentation/devicetree/bindings/power/supply/
Dbq2515x.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/power/supply/bq2515x.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
8 title: TI bq2515x 500-mA Linear charger family
11 - Dan Murphy <dmurphy@ti.com>
12 - Ricardo Rivera-Matos <r-rivera-matos@ti.com>
15 The BQ2515x family is a highly integrated battery charge management IC that
16 integrates the most common functions for wearable devices, namely a charger,
17 an output voltage rail, ADC for battery and system monitoring, and
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/Documentation/devicetree/bindings/pinctrl/
Dpinctrl-max77620.txt1 Pincontrol driver for MAX77620 Power management IC from Maxim Semiconductor.
6 Please refer file <devicetree/bindings/pinctrl/pinctrl-bindings.txt>
7 for details of the common pinctrl bindings used by client devices,
11 --------------------------
14 - pinctrl-names: A pinctrl state named per <pinctrl-bindings.txt>.
15 - pinctrl[0...n]: Properties to contain the phandle for pinctrl states per
16 <pinctrl-bindings.txt>.
19 sub-node have following properties:
22 ------------------
23 - pins: List of pins. Valid values of pins properties are:
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/Documentation/driver-api/
Dregulator.rst1 .. Copyright 2007-2008 Wolfson Microelectronics
20 The intention is to allow systems to dynamically control regulator power
21 output in order to save power and prolong battery life. This applies to
27 ``Documentation/power/regulator``.
30 --------
36 Electronic device that supplies power to other devices. Most regulators
42 Electronic device which consumes power provided by a regulator. These
44 requiring active management of the regulator at runtime.
46 Power Domain
52 Power Management Integrated Circuit (PMIC)
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/Documentation/power/regulator/
Doverview.rst11 The intention is to allow systems to dynamically control regulator power output
12 in order to save power and prolong battery life. This applies to both voltage
26 - Regulator
27 - Electronic device that supplies power to other devices.
31 Input Voltage -> Regulator -> Output Voltage
34 - PMIC
35 - Power Management IC. An IC that contains numerous
39 - Consumer
40 - Electronic device that is supplied power by a regulator.
41 Consumers can be classified into two types:-
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/Documentation/devicetree/bindings/regulator/
Dregulator-max77620.txt1 Regulator DT binding for MAX77620 Power management IC from Maxim Semiconductor.
3 Device has multiple DCDC(sd[0-3] and LDOs(ldo[0-8]). The input supply
6 sub-node "regulators" which is child node of device node.
9 for common regulator bindings used by client.
14 -------------------
18 in-sd0-supply: Input supply for SD0, INA-SD0 or INB-SD0 pins.
19 in-sd1-supply: Input supply for SD1.
20 in-sd2-supply: Input supply for SD2.
21 in-sd3-supply: Input supply for SD3.
22 in-ldo0-1-supply: Input supply for LDO0 and LDO1.
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/Documentation/ABI/testing/
Dsysfs-class-power5 Contact: linux-pm@vger.kernel.org
14 Contact: linux-pm@vger.kernel.org
23 Contact: linux-pm@vger.kernel.org
32 Contact: linux-pm@vger.kernel.org
43 Contact: linux-pm@vger.kernel.org
47 Reports an average IBAT current reading for the battery, over
61 used for discharging batteries, positive values for charging
62 batteries and for USB IBUS current.
66 Contact: linux-pm@vger.kernel.org
81 Contact: linux-pm@vger.kernel.org
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/Documentation/hwmon/
Dadm9240.rst10 Addresses scanned: I2C 0x2c - 0x2f
20 Addresses scanned: I2C 0x2c - 0x2f
24 http://pdfserv.maxim-ic.com/en/ds/DS1780.pdf
30 Addresses scanned: I2C 0x2c - 0x2f
37 - Frodo Looijaard <frodol@dds.nl>,
38 - Philip Edelbrock <phil@netroedge.com>,
39 - Michiel Rook <michiel@grendelproject.nl>,
40 - Grant Coady <gcoady.lk@gmail.com> with guidance
44 ---------
46 chip MSB 5-bit address. Each chip reports a unique manufacturer
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/Documentation/virt/kvm/devices/
Dxive.rst1 .. SPDX-License-Identifier: GPL-2.0
8 - KVM_DEV_TYPE_XIVE POWER9 XIVE Interrupt Controller generation 1
15 requires a POWER9 host and the guest OS should have support for the
22 are required for interrupt management. These are exposed to the
25 1. Thread Interrupt Management Area (TIMA)
27 Each thread has an associated Thread Interrupt Management context
29 handle priority management and interrupt acknowledgment. The most
32 - Interrupt Pending Buffer (IPB)
33 - Current Processor Priority (CPPR)
34 - Notification Source Register (NSR)
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/Documentation/devicetree/bindings/thermal/
Dnvidia,tegra124-soctherm.txt1 Tegra124 SOCTHERM thermal management system
3 The SOCTHERM IP block contains thermal sensors, support for polled
4 or interrupt-based thermal monitoring, CPU and GPU throttling based
10 - compatible : For Tegra124, must contain "nvidia,tegra124-soctherm".
11 For Tegra132, must contain "nvidia,tegra132-soctherm".
12 For Tegra210, must contain "nvidia,tegra210-soctherm".
13 - reg : Should contain at least 2 entries for each entry in reg-names:
14 - SOCTHERM register set
15 - Tegra CAR register set: Required for Tegra124 and Tegra210.
16 - CCROC register set: Required for Tegra132.
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/Documentation/core-api/
Ddma-api.rst7 This document describes the DMA API. For a more gentle introduction
8 of the API (and actual examples), see :doc:`/core-api/dma-api-howto`.
11 Part II describes extensions for supporting non-consistent memory
13 non-consistent platforms (this is usually only legacy platforms) you
16 Part I - dma_API
17 ----------------
19 To get the dma_API, you must #include <linux/dma-mapping.h>. This
22 A dma_addr_t can hold any valid DMA address for the platform. It can be
27 Part Ia - Using large DMA-coherent buffers
28 ------------------------------------------
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