Searched full:priority (Results 1 – 25 of 182) sorted by relevance
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| /Documentation/userspace-api/media/v4l/ |
| D | vidioc-g-priority.rst | 13 VIDIOC_G_PRIORITY - VIDIOC_S_PRIORITY - Query or request the access priority associated with a file…
38 To query the current access priority applications call the
40 variable where the driver stores the current priority.
42 To request an access priority applications store the desired priority in
60 - Lowest priority, usually applications running in background, for
63 read from a device at this priority.
69 - Medium priority, usually applications started and interactively
72 controls. This is the default priority unless an application
76 - Highest priority. Only one file descriptor can have this priority,
88 The requested priority value is invalid.
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| D | app-pri.rst | 6 Application Priority
13 channel. Another objective is to permit low priority applications
21 query the access priority associate with a file descriptor. Opening a
22 device assigns a medium priority, compatible with earlier versions of
24 different priority will usually call :ref:`VIDIOC_S_PRIORITY
30 after another application obtained higher priority.
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| /Documentation/locking/ |
| D | rt-mutex.rst | 5 RT-mutexes with priority inheritance are used to support PI-futexes,
6 which enable pthread_mutex_t priority inheritance attributes
16 RT-mutexes extend the semantics of simple mutexes by the priority
19 A low priority owner of a rt-mutex inherits the priority of a higher
20 priority waiter until the rt-mutex is released. If the temporarily
21 boosted owner blocks on a rt-mutex itself it propagates the priority
23 priority boosting is immediately removed once the rt_mutex has been
27 mutexes which protect shared resources. Priority inheritance is not a
30 an high priority thread, without losing determinism.
33 priority order. For same priorities FIFO order is chosen. For each
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| D | rt-mutex-design.rst | 16 The goal of this document is to help others understand the priority
21 Unbounded Priority Inversion
24 Priority inversion is when a lower priority process executes while a higher
25 priority process wants to run. This happens for several reasons, and
26 most of the time it can't be helped. Anytime a high priority process wants
27 to use a resource that a lower priority process has (a mutex for example),
28 the high priority process must wait until the lower priority process is done
29 with the resource. This is a priority inversion. What we want to prevent
30 is something called unbounded priority inversion. That is when the high
31 priority process is prevented from running by a lower priority process for
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| D | pi-futex.rst | 20 Priority Inheritance - why?
45 design with multiple tasks (with multiple priority levels) sharing
49 we've got even more priority levels.
57 Most of the technical counter-arguments against doing priority
61 does not apply (user-space spinlocks have the same priority inversion
64 locks (such as futex-based pthread mutexes) is priority inheritance:
71 deterministic execution of the high-prio task: any medium-priority task
121 More details about priority inheritance can be found in
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| D | locktypes.rst | 101 RT-mutexes are mutexes with support for priority inheritance (PI).
127 providing priority inheritance for semaphores. After all, an unknown
129 result in priority inversion.
150 Because an rw_semaphore writer cannot grant its priority to multiple
151 readers, a preempted low-priority reader will continue holding its lock,
152 thus starving even high-priority writers. In contrast, because readers
153 can grant their priority to a writer, a preempted low-priority writer will
154 have its priority boosted until it releases the lock, thus preventing that
316 - Because an rwlock_t writer cannot grant its priority to multiple
317 readers, a preempted low-priority reader will continue holding its lock,
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| /Documentation/admin-guide/cgroup-v1/ |
| D | net_prio.rst | 2 Network priority cgroup
5 The Network priority cgroup provides an interface to allow an administrator to
6 dynamically set the priority of network traffic generated by various
9 Nominally, an application would set the priority of its traffic via the
13 2) The priority of application traffic is often a site-specific administrative
17 the priority of egress traffic on a given interface. Network priority groups can
36 It contains a list of tuples in the form <ifname priority>. Contents of this
43 iscsi net_prio cgroup and egressing on interface eth0 to have the priority of
46 priority.
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| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | ti,c64x+megamod-pic.txt | 7 C64X+ core. Priority 0 and 1 are used for reset and NMI respectively.
8 Priority 2 and 3 are reserved. Priority 4-15 are used for interrupt
18 Single cell specifying the core interrupt priority level (4-15) where
19 4 is highest priority and 15 is lowest priority.
37 One for each core interrupt priority level. In addition to the combined
50 The cells contain the core priority interrupt to which the
56 priority interrupts. The first cell corresponds to
57 core priority 4 and the last cell corresponds to
58 core priority 15. The value of each cell is the
70 be the core priority level, not the megamodule interrupt number.
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| D | arm,nvic.txt | 5 vary in the number of interrupts and priority bits per interrupt.
19 The 2nd cell is the priority of the interrupt.
24 - arm,num-irq-priority-bits: The number of priority bits implemented by the
35 arm,num-irq-priority-bits = <4>;
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| D | sifive,plic-1.0.0.yaml | 23 Each interrupt has a configurable priority. Higher priority interrupts are
24 serviced first. Each context can specify a priority threshold. Interrupts
25 with priority below this threshold will not cause the PLIC to raise its
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| /Documentation/virt/kvm/devices/ |
| D | xics.rst | 47 * Pending interrupt priority, 8 bits
48 Zero is the highest priority, 255 means no interrupt is pending.
50 * Pending IPI (inter-processor interrupt) priority, 8 bits
51 Zero is the highest priority, 255 means no IPI is pending.
56 * Current processor priority, 8 bits
57 Zero is the highest priority, meaning no interrupts can be
58 delivered, and 255 is the lowest priority.
71 * Priority, 8 bits
73 This is the priority specified for this interrupt source, where 0 is
74 the highest priority and 255 is the lowest. An interrupt with a
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| D | xive.rst | 29 handle priority management and interrupt acknowledgment. The most
33 - Current Processor Priority (CPPR)
131 values: | eisn | mask | server | priority
133 - priority: 0-7 interrupt priority level
143 -EINVAL Invalid priority
157 The EQ descriptor identifier is a tuple (server, priority)::
160 values: | unused | server | priority
187 -EINVAL Invalid priority
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| /Documentation/vm/ |
| D | swap_numa.rst | 15 Swap device has priority and that decides the order of it to be used. To make
16 use of automatically binding, there is no need to manipulate priority settings
65 The current code uses a priority based list, swap_avail_list, to decide
67 priority, they are used round robin. This change here replaces the single
69 it sees its own priority based list of available swap devices. Swap
70 device's priority can be promoted on its matching node's swap_avail_list.
72 The current swap device's priority is set as: user can set a >=0 value,
73 or the system will pick one starting from -1 then downwards. The priority
76 the semantics for priority >=0 cases, the previous starting from -1 then
79 node, they will all be promoted to priority -1 on that node's plist and will
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| /Documentation/admin-guide/pm/ |
| D | intel-speed-select.rst | 302 allows users to define per core priority. This defines a mechanism to distribute
309 service and hence an associated priority. The granularity is at core level not
316 and use a priority type. There is a default per platform priority type, which
325 Clos Enable: Specify priority type with [--priority|-p]
328 There are two types of priority types:
332 Priority for ordered throttling is defined based on the index of the assigned
333 CLOS group. Where CLOS0 gets highest priority (throttled last).
335 Priority order is:
340 When proportional priority is used, there is an additional parameter called
342 proportional priority is to provide each core with the requested min., then
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| /Documentation/devicetree/bindings/dma/ |
| D | snps,dw-axi-dmac.txt | 12 - snps,priority: Priority of channel. Array size is equal to the number of
13 dma-channels. Priority value must be programmed within [0:dma-channels-1]
14 range. (0 - minimum priority)
37 snps,priority = <0 1 2 3>;
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| /Documentation/devicetree/bindings/power/reset/ |
| D | gpio-restart.txt | 11 priority order. The gpio is configured as an output, and driven active,
31 - priority : A priority ranging from 0 to 255 (default 128) according to
38 255: Highest priority restart handler, will preempt all other
50 priority = <128>;
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| /Documentation/devicetree/bindings/thermal/ |
| D | nvidia,tegra124-soctherm.txt | 39 - nvidia,priority: Each throttles has its own throttle settings, so the
42 Bigger value indicates higher priority, In general, higher priority
44 thermal alarms are given higher priority, and ensure that there is
45 no race if priority of two vectors is set to the same value.
128 nvidia,priority = <100>;
141 nvidia,priority = <80>;
150 * arbiter will select the highest priority as the final throttle
155 nvidia,priority = <50>;
181 nvidia,priority = <100>;
192 nvidia,priority = <80>;
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| /Documentation/devicetree/bindings/mailbox/ |
| D | mtk-gce.txt | 19 <&phandle channel priority>
22 priority: Priority of GCE thread.
40 sub-system ids, thread priority, event ids.
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| /Documentation/ABI/testing/ |
| D | sysfs-platform-hidma-mgmt | 1 What: /sys/devices/platform/hidma-mgmt*/chanops/chan*/priority
2 /sys/devices/platform/QCOM8060:*/chanops/chan*/priority
8 low priority (0) or high priority (1) channel.
17 equal priority channels during round robin scheduling.
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| D | sysfs-bus-coresight-devices-funnel | 8 What: /sys/bus/coresight/devices/<memory_map>.funnel/priority
12 Description: (RW) Defines input port priority order.
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| D | dev-kmsg | 14 carries the syslog priority and facility. The single decimal
16 priority and the next 8 bits the syslog facility number.
18 If no prefix is given, the priority number is the default kernel
19 log priority and the facility number is set to LOG_USER (1). It
74 prefix including priority and facility, the 64 bit message
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| /Documentation/devicetree/bindings/bus/ |
| D | ti,da850-mstpri.txt | 2 priority driver
4 DA8XX SoCs feature a set of registers allowing to change the priority of all
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| /Documentation/devicetree/bindings/c6x/ |
| D | emifa.txt | 20 - ti,emifa-burst-priority:
21 Number of memory transfers after which the EMIF will elevate the priority
42 ti,emifa-burst-priority = <255>;
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| /Documentation/devicetree/bindings/usb/ |
| D | lpc32xx-udc.txt | 8 * USB Device Low Priority Interrupt
9 * USB Device High Priority Interrupt
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| /Documentation/devicetree/bindings/net/ |
| D | intel,dwmac-plat.yaml | 74 snps,priority = <0x0>;
80 snps,priority = <0x1>;
90 snps,priority = <0x0>;
96 snps,priority = <0x1>;
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