Searched full:provider (Results 1 – 25 of 110) sorted by relevance
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| /Documentation/driver-api/pci/ |
| D | p2pdma.rst | 36 * Provider - A driver which provides or publishes P2P resources like
44 it may be typical for a driver to be both a provider and a client).
48 * The NVMe PCI driver is both a client, provider and orchestrator
50 resource (provider), it accepts P2P memory pages as buffers in requests
61 memory behind it, its driver could add support as a P2P provider and
66 Provider Drivers
69 A provider simply needs to register a BAR (or a portion of a BAR)
108 a specific P2P provider to use it may check compatibility using
109 :c:func:`pci_p2pdma_distance()` otherwise it may find a memory provider
111 If more than one provider is supported, the one nearest to all the clients will
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| /Documentation/devicetree/bindings/power/ |
| D | power-domain.yaml | 20 their PM domains provided by PM domain providers. A PM domain provider can be
22 domains. A consumer node can refer to the provider by a phandle and a set of
24 \#power-domain-cells property in the PM domain provider node.
34 power-domain provider. The idle state definitions are compatible with the
47 provider. If the provider provides a single power domain only or all
48 the power domains provided by the provider have identical OPP tables,
57 by device tree binding documentation of particular provider.
66 by the given provider should be subdomains of the domain specified
82 // The node above defines a power controller that is a PM domain provider and
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| D | power_domain.txt | 8 their PM domains provided by PM domain providers. A PM domain provider can be
10 domains. A consumer node can refer to the provider by a phandle and a set of
12 #power-domain-cells property in the PM domain provider node.
22 the power controller that is the PM domain provider.
63 - OPP table for domain provider that provides two domains.
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| /Documentation/devicetree/bindings/reset/ |
| D | reset.txt | 9 a reset provider (e.g. power management or clock module) and received by a
11 ordinate module is reset). This binding exists to represent the provider and
14 A reset signal is represented by the phandle of the provider, plus a reset
16 provider. The length (number of cells) and semantics of the reset specifier
17 are dictated by the binding of the reset provider, although common schemes
50 device manages. Note: if the reset provider specifies '0' for
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| /Documentation/devicetree/bindings/interconnect/ |
| D | interconnect.txt | 1 Interconnect Provider Device Tree Bindings
10 The interconnect provider binding is intended to represent the interconnect
11 controllers in the system. Each provider registers a set of interconnect
20 - compatible : contains the interconnect provider compatible string
46 interconnects : Pairs of phandles and interconnect provider specifier to denote
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| D | qcom,osm-l3.yaml | 7 title: Qualcomm Operating State Manager (OSM) L3 Interconnect Provider
14 The OSM L3 interconnect provider aggregates the L3 bandwidth requests
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| D | qcom,rpmh.yaml | 15 RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is
17 associated with each execution environment. Provider nodes must point to at
18 least one RPMh device child node pertaining to their RSC and each provider
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| /Documentation/driver-api/ |
| D | interconnect.rst | 55 Interconnect provider is the software definition of the interconnect hardware.
60 port. Each interconnect provider consists of multiple interconnect nodes,
63 called an interconnect node, which belongs to the Mem NoC interconnect provider.
81 Interconnect provider is an entity that implements methods to initialize and
82 configure interconnect bus hardware. The interconnect provider drivers should
83 be registered with the interconnect provider core.
85 .. kernel-doc:: include/linux/interconnect-provider.h
111 same provider as subgraphs. The format is human-readable and can also be piped
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| D | nvmem.rst | 36 NVMEM provider refers to an entity that implements methods to initialize, read
39 2. Registering/Unregistering the NVMEM provider
42 A NVMEM provider can register with NVMEM core by supplying relevant
46 nvmem_unregister(nvmem) is used to unregister a previously registered provider.
63 It is mandatory that the NVMEM provider has a regmap associated with its
100 NVMEM consumers are the entities which make use of the NVMEM provider to
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| /Documentation/driver-api/phy/ |
| D | phy.rst | 28 Registering/Unregistering the PHY provider
31 PHY provider refers to an entity that implements one or more PHY instances.
32 For the simple case where the PHY provider implements only a single instance of
34 of_phy_simple_xlate. If the PHY provider implements multiple instances, it
50 2 macros to register the PHY provider.
52 Often the device tree nodes associated with a PHY provider will contain a set
93 Inorder to dereference the private data (in phy_ops), the phy provider driver
167 phy_create (PHY provider device).
170 pm_runtime_get_sync of PHY provider device because of parent-child relationship.
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| /Documentation/devicetree/bindings/sound/ |
| D | sgtl5000.yaml | 28 - description: the clock provider of SYS_MCLK
31 description: the regulator provider of VDDA
34 description: the regulator provider of VDDIO
37 description: the regulator provider of VDDD
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| D | st,stm32-sai.txt | 35 clock provider, SAI provider phandle must be specified here.
38 with a SAI set as MCLK clock provider.
59 is a master clock provider, according to clocks bindings, described in
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| D | maxim,max98088.txt | 12 - clocks: the clock provider of MCLK, see ../clock/clock-bindings.txt section
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| /Documentation/devicetree/bindings/mmc/ |
| D | mmc-pwrseq-simple.yaml | 7 title: Simple MMC power sequence provider binding
13 The purpose of the simple MMC power sequence provider is to supports a set
15 the same provider for several SOC designs.
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| /Documentation/devicetree/bindings/mfd/ |
| D | aspeed-scu.txt | 11 clock provider
13 reset line provider
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| D | twl6040.txt | 14 - #clock-cells = <0>; twl6040 is a provider of pdmclk which is used by McPDM
22 - clocks: phandle to the clk32k and/or to mclk clock provider
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| /Documentation/devicetree/bindings/phy/ |
| D | phy-bindings.txt | 10 provider can use the values in cells to find the appropriate
29 That node describes an IP block (PHY provider) that implements 2 different PHYs.
70 This node represents a controller that uses one of the PHYs of the PHY provider
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| /Documentation/devicetree/bindings/clock/ |
| D | clock-bindings.txt | 6 nodes use a phandle and clock specifier pair to connect clock provider
10 value of a #clock-cells property in the clock provider node.
25 specific to the clock provider, and is only provided to
33 the provider's clock-output-names property.
68 clock provider specifies '0' for #clock-cells, then
129 * The PLL is both a clock provider and a clock consumer. It uses the clock
170 be similarly specified in the clock provider node.
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| D | alphascale,acc.txt | 12 as an index of the clock inside the provider.
20 _SYS_ - adjustable clock source. Not all peripheral have _SYS_ clock provider.
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| /Documentation/devicetree/bindings/net/ |
| D | marvell,prestera.txt | 53 - base-mac-provider: describes handle to node which provides base mac address,
54 might be a static base mac address or nvme cell provider.
69 base-mac-provider = <&eeprom_mac_addr>;
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| /Documentation/driver-api/iio/ |
| D | hw-consumer.rst | 5 case the buffers between IIO provider and IIO consumer are handled by hardware.
21 As standard IIO device the implementation is based on IIO provider/consumer.
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| /Documentation/devicetree/bindings/iio/ |
| D | iio-bindings.txt | 6 nodes use a phandle and IIO specifier pair to connect IIO provider
10 value of a #io-channel-cells property in the IIO provider node.
55 IIO provider specifies '0' for #io-channel-cells,
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| /Documentation/devicetree/bindings/hwlock/ |
| D | hwlock.txt | 25 - hwlocks: List of phandle to a hwlock provider node and an
40 the node hwlock1. hwlock1 is a hwlock provider with an argument specifier
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| /Documentation/devicetree/bindings/timer/ |
| D | snps,archs-rtc.txt | 2 - clocksource provider for UP SoC
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| D | snps,archs-gfrc.txt | 2 - clocksource provider for SMP SoC
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