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/Documentation/devicetree/bindings/arm/
Dpsci.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/arm/psci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Power State Coordination Interface (PSCI)
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
13 Firmware implementing the PSCI functions described in ARM document number
15 processors") can be used by Linux to initiate various CPU-centric power
18 Issue A of the specification describes functions for CPU suspend, hotplug
21 Functions are invoked by trapping to the privilege level of the PSCI
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Didle-states.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/idle-states.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
14 1 - Introduction
18 where cores can be put in different low-power states (ranging from simple wfi
20 range of dynamic idle states that a processor can enter at run-time, can be
27 - Running
28 - Idle_standby
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Dcpu-capacity.txt6 1 - Introduction
15 2 - CPU capacity definition
19 heterogeneity. Such heterogeneity can come from micro-architectural differences
23 capture a first-order approximation of the relative performance of CPUs.
29 * A "single-threaded" or CPU affine benchmark
43 3 - capacity-dmips-mhz
46 capacity-dmips-mhz is an optional cpu node [1] property: u32 value
51 capacity-dmips-mhz property is all-or-nothing: if it is specified for a cpu
54 available, final capacities are calculated by directly using capacity-dmips-
58 4 - Examples
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