Searched full:rates (Results 1 – 25 of 138) sorted by relevance
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| /Documentation/devicetree/bindings/serial/ |
| D | nvidia,tegra20-hsuart.txt | 27 - nvidia,adjust-baud-rates: List of entries providing percentage of baud rate
46 Tx baud rate observed. To do this we use nvidia,adjust-baud-rates
48 As an example, consider there is deviation observed in Tx for baud rates as
56 nvidia,adjust-baud-rates = <0 9600 100>,
72 nvidia,adjust-baud-rates = <1000000 4000000 136>; /* 1.36% shift */
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| D | st-asc.txt | 12 for high bit rates (above 19.2K)
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| /Documentation/devicetree/bindings/display/hisilicon/ |
| D | hisi-ade.txt | 22 - assigned-clock-rates: clock rates, one for each entry in assigned-clocks.
56 assigned-clock-rates = <360000000>, <288000000>;
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| /Documentation/sound/cards/ |
| D | img-spdif-in.rst | 25 rates. The active rate can be obtained by reading the 'SPDIF In Lock Frequency'
31 four sample rates set here.
33 If less than four rates are required, the same rate can be specified more than
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| D | maya44.rst | 29 - playback and capture at all sampling rates
63 * pci/ice1724/ice1724.h.patch - PROPOSED patch to ice1724.h (see SAMPLING RATES)
92 SAMPLING RATES
101 * In the current state of the driver, setting rates of up to 192 kHz is permitted even for capture …
103 *AVOID CAPTURING AT RATES ABOVE 96kHz*, even though it may appear to work. The codec cannot actuall…
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| /Documentation/devicetree/bindings/mtd/ |
| D | vf610-nfc.txt | 13 - assigned-clock-rates: The NAND bus timing is derived from this clock
17 there might be restrictions on maximum rates when using hardware ECC.
48 assigned-clock-rates = <33000000>;
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| /Documentation/devicetree/bindings/mmc/ |
| D | sdhci-atmel.txt | 16 - assigned-clock-rates The rate of "multclk" in order to not rely on the
32 assigned-clock-rates = <480000000>;
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| /Documentation/ABI/testing/ |
| D | configfs-usb-gadget-uac1 | 9 c_srate list of capture sampling rates (comma-separated)
20 p_srate list of playback sampling rates (comma-separated)
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| D | configfs-usb-gadget-uac2 | 9 c_srate list of capture sampling rates (comma-separated)
23 p_srate list of playback sampling rates (comma-separated)
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| D | sysfs-driver-hid-picolcd | 33 Reading: returns list of available refresh rates (expressed in Hz),
37 within permitted rates.
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| /Documentation/devicetree/bindings/ata/ |
| D | qcom-sata.txt | 25 - assigned-clock-rates : Shall be:
44 assigned-clock-rates = <100000000>, <100000000>;
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| /Documentation/devicetree/bindings/phy/ |
| D | phy-rockchip-typec.txt | 13 - assigned-clock-rates : the phy core clk frequency, shall be: 50000000
47 assigned-clock-rates = <50000000>;
71 assigned-clock-rates = <50000000>;
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| /Documentation/devicetree/bindings/display/msm/ |
| D | dpu.txt | 39 - assigned-clock-rates: list of clock frequencies sorted in the same order as
71 - assigned-clock-rates: list of clock frequencies sorted in the same order as
88 assigned-clock-rates = <300000000>;
118 assigned-clock-rates = <0 0 300000000 19200000>;
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| /Documentation/devicetree/bindings/sound/ |
| D | nvidia,tegra210-ahub.yaml | 48 assigned-clock-rates:
121 assigned-clock-rates = <1536000>;
132 assigned-clock-rates = <3072000>;
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| D | brcm,cygnus-audio.txt | 16 - assigned-clock-rates: List of clock frequencies of the
41 assigned-clock-rates = <1769470191>,
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| D | nvidia,tegra186-dspk.yaml | 46 assigned-clock-rates:
80 assigned-clock-rates = <12288000>;
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| D | nvidia,tegra210-dmic.yaml | 47 assigned-clock-rates:
80 assigned-clock-rates = <3072000>;
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| D | st,stm32-i2s.yaml | 31 - description: I2S parent clock for sampling rates multiple of 8kHz.
32 - description: I2S parent clock for sampling rates multiple of 11.025kHz.
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| D | nvidia,tegra210-i2s.yaml | 64 assigned-clock-rates:
98 assigned-clock-rates = <1536000>;
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| D | mt2701-afe-pcm.txt | 50 - assigned-clock-rates: list of clock frequencies of assigned clocks.
144 assigned-clock-rates = <0>, <0>, <49152000>, <45158400>;
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| /Documentation/sound/soc/ |
| D | clocking.rst | 15 audio playback and capture sample rates.
43 audio clocks as it usually gives more accurate sample rates than the CPU.
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| /Documentation/devicetree/bindings/clock/ |
| D | clock-bindings.txt | 135 ==Assigned clock parents and rates==
139 node through assigned-clocks, assigned-clock-parents and assigned-clock-rates
142 assigned-clock-rates property should contain a list of frequencies in Hz. Both
158 assigned-clock-rates = <0>, <460800>;
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| /Documentation/misc-devices/ |
| D | bh1770glc.rst | 74 RO - supported measurement rates
127 RO - Supported proximity measurement rates in Hz
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| /Documentation/devicetree/bindings/display/rockchip/ |
| D | cdn-dp-rockchip.txt | 20 - assigned-clock-rates : the DP core clk frequency, shall be: 100000000
45 assigned-clock-rates = <100000000>;
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| /Documentation/devicetree/bindings/display/imx/ |
| D | nxp,imx8mq-dcss.yaml | 71 assigned-clock-rates:
100 assigned-clock-rates = <800000000>,
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