Searched full:revisions (Results 1 – 25 of 49) sorted by relevance
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| /Documentation/hwmon/ |
| D | k8temp.rst | 24 revisions of K8 except the first two revisions (SH-B0 and SH-B3).
53 For newer revisions of CPU (rev F, socket AM2) there is a mathematically
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| D | abituguru3.rst | 15 it to behave as a hwmon IC. There are many different revisions of the
16 firmware and thus effectively many different revisions of the uGuru.
17 Below is an incomplete list with which revisions are used for which
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| D | abituguru.rst | 19 it to behave as a hwmon IC. There are many different revisions of the
20 firmware and thus effectively many different revisions of the uGuru.
21 Below is an incomplete list with which revisions are used for which
32 .. [1] For revisions 2 and 3 uGuru's the driver can autodetect the
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| D | it87.rst | 217 The IT8716F, IT8718F, IT8720F, IT8721F/IT8758E and later IT8712F revisions
224 not compatible with the older chips and revisions. The 16-bit tachometer mode
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| D | k10temp.rst | 95 will refuse to load on these revisions unless you specify the "force=1"
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| D | sis5595.rst | 25 Supports following revisions:
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| /Documentation/devicetree/bindings/arm/msm/ |
| D | qcom,saw2.txt | 10 Multiple revisions of the SAW hardware are supported using these Device Nodes.
11 SAW2 revisions differ in the register offset and configuration data. Also, the
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| /Documentation/devicetree/bindings/i2c/ |
| D | brcm,iproc-i2c.txt | 24 Should contain the I2C interrupt. For certain revisions of the I2C
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| /Documentation/devicetree/bindings/arm/ |
| D | fw-cfg.txt | 26 revisions / feature bits.
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| D | qcom.yaml | 14 device properties like SoC and platform and revisions of those components.
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| /Documentation/devicetree/bindings/net/ |
| D | micrel.txt | 28 Note that this option in only needed for certain PHY revisions with a
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| /Documentation/devicetree/bindings/iommu/ |
| D | arm,smmu-v3.yaml | 15 revisions, replacing the MMIO register interface with in-memory command
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| /Documentation/devicetree/bindings/memory-controllers/ti/ |
| D | emif.txt | 6 of the EMIF IP and memory parts attached to it. Certain revisions
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| /Documentation/virt/kvm/arm/ |
| D | psci.rst | 16 observe two different "firmware" revisions. This could cause issues if
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| /Documentation/arm64/ |
| D | tagged-pointers.rst | 67 future architecture revisions which may preserve the bits.
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| /Documentation/scsi/ |
| D | lpfc.rst | 31 In older revisions of the lpfc driver, the driver internally queued i/o
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| D | ChangeLog.sym53c8xx | 219 function chips, since I cannot make sure for what chip revisions
424 - Some 896 chip revisions (all for now :-)), may hang-up if the
514 transactions since those early chip revisions may use such on
590 at least for some chip revisions.
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| /Documentation/devicetree/bindings/usb/ |
| D | aspeed,usb-vhub.yaml | 19 revisions. AST2400 and AST2500 Virtual Hub supports 5 downstream devices
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| /Documentation/devicetree/bindings/display/msm/ |
| D | mdp5.txt | 60 The availability of output ports can vary across SoC revisions:
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| /Documentation/power/ |
| D | suspend-and-cpuhotplug.rst | 197 In this case since we probably need to apply different microcode revisions
250 type/model and the need for validating whether the microcode revisions are
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| /Documentation/dev-tools/kunit/ |
| D | index.rst | 69 <https://gist.github.com/lorn/1272686/revisions#diff-53c65572127855f1b003db4064a94573R874>`_:
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| /Documentation/devicetree/bindings/cpufreq/ |
| D | ti-cpufreq.txt | 58 * cpu0 has different OPPs depending on SoC revision and some on revisions
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| /Documentation/networking/dsa/ |
| D | bcm_sf2.rst | 76 pseudo-PHY addresses. Newer revisions of the SF2 hardware have introduced a
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| /Documentation/filesystems/ |
| D | ext2.rst | 121 filesystems, later revisions can optionally reduce the number of backup
129 what version of the filesystem it is (see the Revisions section below)
182 each name with an inode number. Later revisions of the filesystem also
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| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | arm,gic.yaml | 147 Certain revisions of GIC-400 supports MSI/MSI-x via V2M register frame(s).
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