Searched full:sibling (Results 1 – 25 of 27) sorted by relevance
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/Documentation/devicetree/ |
D | of_unittest.rst | 72 struct device_node *sibling; 77 considering only child and sibling pointers. There exists another pointer, 79 a particular level the child node and all the sibling nodes will have a parent 142 replaces the current child and turns it into its sibling. So, when the testcase 183 sibling compared to the earlier structure (Figure 2). After attaching first 185 (i.e. test-child0) to become a sibling and makes itself a child node, 204 node's parent to its sibling or attaches the previous sibling to the given 205 node's sibling, as appropriate. That is it :)
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/Documentation/x86/ |
D | mds.rst | 163 sibling threads are offline CPU buffer clearing is not required. 178 sibling after the store buffer got repartitioned and all entries are 179 available to the non idle sibling. 182 sibling has half of it available. The back from idle CPU could be then 183 speculatively exposed to contents of the sibling. The buffers are
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/Documentation/ABI/testing/ |
D | sysfs-class-leds-gt683r | 7 of one LED will update the mode of its two sibling devices as
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/Documentation/devicetree/bindings/power/supply/ |
D | twl-charger.txt | 9 if there is a sibling of the BCI node which is compatible with
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/Documentation/devicetree/bindings/usb/ |
D | twlxxxx-usb.txt | 33 If a sibling node is compatible "ti,twl4030-bci", then it will find
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/Documentation/devicetree/bindings/arm/ |
D | arm,versatile.yaml | 30 PCI host controller. Like the sibling board, it is done specifically
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/Documentation/admin-guide/hw-vuln/ |
D | spectre.rst | 127 from the sibling thread, as level 1 cache and branch target buffer 129 program running on the sibling thread may influence its peer's BTB to 235 sibling hyperthread sharing a physical processor core on simultaneous 248 a sibling hardware thread sharing the same physical core. 259 sibling thread from controlling branch target buffer. In addition, 320 in the sibling hyperthread can be mitigated by the administrator, 522 sibling thread when the user program is running, and use IBPB to 561 To mitigate guest-to-guest attacks from sibling thread when SMT is 562 in use, an untrusted guest running in the sibling thread can have 729 sibling threads.
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D | special-register-buffer-data-sampling.rst | 58 executed on another core or sibling thread using MDS techniques. 89 take longer to execute and do not impact performance of sibling logical
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D | l1tf.rst | 100 the context which runs on the sibling Hyperthread of the same physical 206 sibling thread will also bring back its data into the L1D which makes it 223 If only a single guest or related guests run on sibling SMT threads on 227 Host memory is attackable, when one of the sibling SMT threads runs in 322 online a non-primary sibling is rejected 342 physical core two or more sibling threads are online.
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D | srso.rst | 90 - potentially create and pin an additional workload on the sibling
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/Documentation/driver-api/ |
D | i2c.rst | 29 The System Management Bus (SMBus) is a sibling protocol. Most SMBus
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D | device_link.rst | 182 for HDMI/DP audio. In the device hierarchy the HDA controller is a sibling
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/Documentation/i2c/ |
D | i2c-topology.rst | 101 non-sibling muxes. 326 Two mux-locked sibling muxes 350 Two parent-locked sibling muxes 374 Mux-locked and parent-locked sibling muxes
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/Documentation/maintainer/ |
D | rebasing-and-merging.rst | 110 from lower-level subsystem trees and from others, either sibling trees or 135 Merging from sibling or upstream trees
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/Documentation/hwmon/ |
D | amd_energy.rst | 52 reading those registers from the sibling threads would result
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/Documentation/scheduler/ |
D | sched-rt-group.rst | 158 Consider two sibling groups A and B; both have 50% bandwidth, but A's
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/Documentation/filesystems/ |
D | xfs-self-describing-metadata.rst | 51 understanding how things like cross linked block lists (e.g. sibling 161 sibling pointer lists). Hence we still need stateful checking in the main code
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/Documentation/core-api/ |
D | xarray.rst | 364 * - Sibling 480 reveal sibling entries; these should be skipped over by the caller.
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D | dma-api.rst | 72 Note that unlike their sibling allocation calls, these routines
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/Documentation/dev-tools/ |
D | kfence.rst | 283 directly influenced by GWP-ASan, and can be seen as its kernel sibling. Another
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/Documentation/admin-guide/cgroup-v1/ |
D | cpusets.rst | 213 - If its cpu or memory is exclusive, they may not overlap any sibling. 548 on the same CPU X, and if CPU Y is X's sibling and performing idle,
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/Documentation/admin-guide/mm/ |
D | numa_memory_policy.rst | 65 subsequently created by that thread. Any sibling threads existing
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/Documentation/admin-guide/pm/ |
D | intel_pstate.rst | 522 core P-states support, when hyper-threading is enabled, if the sibling CPU
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D | intel-speed-select.rst | 482 Once a CPU is associated, its sibling CPUs are also associated to a CLOS group.
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/Documentation/driver-api/usb/ |
D | usb.rst | 339 interface. *Bulk* transfers are easiest to use, but only their sibling
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