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/Documentation/devicetree/bindings/net/
Dmarvell-pxa168.txt4 - compatible: should be "marvell,pxa168-eth".
5 - reg: address and length of the register set for the device.
6 - interrupts: interrupt for the device.
7 - clocks: pointer to the clock for the device.
10 - port-id: Ethernet port number. Should be '0','1' or '2'.
11 - #address-cells: must be 1 when using sub-nodes.
12 - #size-cells: must be 0 when using sub-nodes.
13 - phy-handle: see ethernet.txt file in the same directory.
18 Sub-nodes:
19 Each PHY can be represented as a sub-node. This is not mandatory.
[all …]
/Documentation/devicetree/bindings/pinctrl/
Dmeson,pinctrl.txt4 - compatible: one of "amlogic,meson8-cbus-pinctrl"
5 "amlogic,meson8b-cbus-pinctrl"
6 "amlogic,meson8m2-cbus-pinctrl"
7 "amlogic,meson8-aobus-pinctrl"
8 "amlogic,meson8b-aobus-pinctrl"
9 "amlogic,meson8m2-aobus-pinctrl"
10 "amlogic,meson-gxbb-periphs-pinctrl"
11 "amlogic,meson-gxbb-aobus-pinctrl"
12 "amlogic,meson-gxl-periphs-pinctrl"
13 "amlogic,meson-gxl-aobus-pinctrl"
[all …]
Dimg,pistachio-pinctrl.txt8 each. The GPIO banks are represented as sub-nodes of the pad controller node.
10 Please refer to pinctrl-bindings.txt, ../gpio/gpio.txt, and
11 ../interrupt-controller/interrupts.txt for generic information regarding
15 --------------------------------------------
16 - compatible: "img,pistachio-system-pinctrl".
17 - reg: Address range of the pinctrl registers.
19 Required properties for GPIO bank sub-nodes:
20 --------------------------------------------
21 - interrupts: Interrupt line for the GPIO bank.
22 - gpio-controller: Indicates the device is a GPIO controller.
[all …]
/Documentation/driver-api/media/
Dv4l2-intro.rst1 .. SPDX-License-Identifier: GPL-2.0
4 ------------
7 hardware: most devices have multiple ICs, export multiple device nodes in
8 /dev, and create also non-V4L2 devices such as DVB, ALSA, FB, I2C and input
15 called 'sub-devices'.
18 creating V4L device nodes and video_buf for handling the video buffers
22 connecting to sub-devices themselves. Some of this is quite complicated
32 A good example to look at as a reference is the v4l2-pci-skeleton.c
38 -------------------------
44 2) A way of initializing and commanding sub-devices (if any).
[all …]
Dv4l2-subdev.rst1 .. SPDX-License-Identifier: GPL-2.0
3 V4L2 sub-devices
4 ----------------
6 Many drivers need to communicate with sub-devices. These devices can do all
8 encoding or decoding. For webcams common sub-devices are sensors and camera
12 driver with a consistent interface to these sub-devices the
13 :c:type:`v4l2_subdev` struct (v4l2-subdev.h) was created.
15 Each sub-device driver must have a :c:type:`v4l2_subdev` struct. This struct
16 can be stand-alone for simple sub-devices or it might be embedded in a larger
18 low-level device struct (e.g. ``i2c_client``) that contains the device data as
[all …]
/Documentation/devicetree/bindings/dma/
Dmv-xor.txt4 - compatible: Should be one of the following:
5 - "marvell,orion-xor"
6 - "marvell,armada-380-xor"
7 - "marvell,armada-3700-xor".
8 - reg: Should contain registers location and length (two sets)
11 - clocks: pointer to the reference clock
13 The DT node must also contains sub-nodes for each XOR channel that the
14 XOR engine has. Those sub-nodes have the following required
16 - interrupts: interrupt of the XOR channel
18 The sub-nodes used to contain one or several of the following
[all …]
Dadi,axi-dmac.txt1 Analog Devices AXI-DMAC DMA controller
4 - compatible: Must be "adi,axi-dmac-1.00.a".
5 - reg: Specification for the controllers memory mapped register map.
6 - interrupts: Specification for the controllers interrupt.
7 - clocks: Phandle and specifier to the controllers AXI interface clock
8 - #dma-cells: Must be 1.
10 Required sub-nodes:
11 - adi,channels: This sub-node must contain a sub-node for each DMA channel. For
12 the channel sub-nodes the following bindings apply. They must match the
15 Required properties for adi,channels sub-node:
[all …]
/Documentation/devicetree/bindings/bus/
Domap-ocp2scp.txt1 * OMAP OCP2SCP - ocp interface to scp interface
4 - compatible : Should be "ti,am437x-ocp2scp" for AM437x processor
5 Should be "ti,omap-ocp2scp" for all others
6 - reg : Address and length of the register set for the device
7 - #address-cells, #size-cells : Must be present if the device has sub-nodes
8 - ranges : the child address space are mapped 1:1 onto the parent address space
9 - ti,hwmods : must be "ocp2scp_usb_phy"
11 Sub-nodes:
12 All the devices connected to ocp2scp are described using sub-node to ocp2scp
15 compatible = "ti,omap-ocp2scp";
[all …]
/Documentation/devicetree/bindings/phy/
Dbrcm-sata-phy.txt4 - compatible: should be one or more of
5 "brcm,bcm7216-sata-phy"
6 "brcm,bcm7425-sata-phy"
7 "brcm,bcm7445-sata-phy"
8 "brcm,iproc-ns2-sata-phy"
9 "brcm,iproc-nsp-sata-phy"
10 "brcm,phy-sata3"
11 "brcm,iproc-sr-sata-phy"
12 "brcm,bcm63138-sata-phy"
13 - address-cells: should be 1
[all …]
Dphy-stm32-usbphyc.txt14 |_ PHY port#2 ----| |________________
23 - compatible: must be "st,stm32mp1-usbphyc"
24 - reg: address and length of the usb phy control register set
25 - clocks: phandle + clock specifier for the PLL phy clock
26 - #address-cells: number of address cells for phys sub-nodes, must be <1>
27 - #size-cells: number of size cells for phys sub-nodes, must be <0>
30 - assigned-clocks: phandle + clock specifier for the PLL phy clock
31 - assigned-clock-parents: the PLL phy clock parent
32 - resets: phandle + reset specifier
34 Required nodes: one sub-node per port the controller provides.
[all …]
Dberlin-sata-phy.txt2 ---------------
5 - compatible: should be one of
6 "marvell,berlin2-sata-phy"
7 "marvell,berlin2q-sata-phy"
8 - address-cells: should be 1
9 - size-cells: should be 0
10 - phy-cells: from the generic PHY bindings, must be 1
11 - reg: address and length of the register
12 - clocks: reference to the clock entry
14 Sub-nodes:
[all …]
Drockchip-usb-phy.txt4 - compatible: matching the soc type, one of
5 "rockchip,rk3066a-usb-phy"
6 "rockchip,rk3188-usb-phy"
7 "rockchip,rk3288-usb-phy"
8 - #address-cells: should be 1
9 - #size-cells: should be 0
12 - rockchip,grf : phandle to the syscon managing the "general
13 register files" - phy should be a child of the GRF instead
15 Sub-nodes:
16 Each PHY should be represented as a sub-node.
[all …]
/Documentation/devicetree/bindings/ata/
Dahci-platform.txt3 SATA nodes are defined to describe on-chip Serial ATA controllers.
6 It is possible, but not required, to represent each port as a sub-node.
11 - compatible : compatible string, one of:
12 - "brcm,iproc-ahci"
13 - "hisilicon,hisi-ahci"
14 - "cavium,octeon-7130-ahci"
15 - "ibm,476gtr-ahci"
16 - "marvell,armada-380-ahci"
17 - "marvell,armada-3700-ahci"
18 - "snps,dwc-ahci"
[all …]
/Documentation/userspace-api/media/v4l/
Dopen.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
18 The bridge driver exposes one or more V4L2 device nodes
22 the hardware, which may also expose device nodes, called V4L2 sub-devices.
24 When such V4L2 sub-devices are exposed, they allow controlling those
25 other hardware components - usually connected via a serial bus (like
26 I²C, SMBus or SPI). Depending on the bridge driver, those sub-devices
29 :ref:`V4L2 sub-devices <subdev>`.
32 :ref:`Media Controller <media_controller>` are called **MC-centric**
33 devices. The devices that are fully controlled via V4L2 device nodes
34 are called **video-node-centric**.
[all …]
Dpixfmt-tch-td08.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _V4L2-TCH-FMT-DELTA-TD08:
11 8-bit signed Touch Delta
18 Delta values may range from -128 to 127. Typically the values will vary through
20 may be seen if one of the touchscreen nodes has a fault or the line is not
28 .. flat-table::
29 :header-rows: 0
30 :stub-columns: 0
33 * - start + 0:
34 - D'\ :sub:`00`
[all …]
Dpixfmt-tch-td16.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _V4L2-TCH-FMT-DELTA-TD16:
11 16-bit signed little endian Touch Delta
19 Delta values may range from -32768 to 32767. Typically the values will vary
21 full value may be seen if one of the touchscreen nodes has a fault or the line
27 .. flat-table::
28 :header-rows: 0
29 :stub-columns: 0
32 * - start + 0:
33 - D'\ :sub:`00low`
[all …]
Ddev-subdev.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
6 Sub-device Interface
13 components as software blocks called sub-devices.
15 V4L2 sub-devices are usually kernel-only objects. If the V4L2 driver
17 media entities. Applications will be able to enumerate the sub-devices
21 In addition to make sub-devices discoverable, drivers can also choose to
23 sub-device driver and the V4L2 device driver support this, sub-devices
26 - query, read and write sub-devices controls
28 - subscribe and unsubscribe to events and retrieve them
30 - negotiate image formats on individual pads
[all …]
/Documentation/devicetree/bindings/mtd/
Dsamsung-s3c2410.txt4 - compatible : The possible values are:
5 "samsung,s3c2410-nand"
6 "samsung,s3c2412-nand"
7 "samsung,s3c2440-nand"
8 - reg : register's location and length.
9 - #address-cells, #size-cells : see nand-controller.yaml
10 - clocks : phandle to the nand controller clock
11 - clock-names : must contain "nand"
13 Optional child nodes:
14 Child nodes representing the available nand chips.
[all …]
/Documentation/devicetree/bindings/remoteproc/
Dti,k3-dsp-rproc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,k3-dsp-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Suman Anna <s-anna@ti.com>
13 The TI K3 family of SoCs usually have one or more TI DSP Core sub-systems
14 that are used to offload some of the processor-intensive tasks or algorithms,
17 These processor sub-systems usually contain additional sub-modules like
23 Each DSP Core sub-system is represented as a single DT node. Each node has a
29 - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
[all …]
/Documentation/admin-guide/media/
Dfimc.rst1 .. SPDX-License-Identifier: GPL-2.0
8 Copyright |copy| 2012 - 2013 Samsung Electronics Co., Ltd.
17 drivers/media/platform/exynos4-is directory.
20 --------------
22 S5PC100 (mem-to-mem only), S5PV210, Exynos4210
25 ------------------
27 - camera parallel interface capture (ITU-R.BT601/565);
28 - camera serial interface capture (MIPI-CSI2);
29 - memory-to-memory processing (color space conversion, scaling, mirror
31 - dynamic pipeline re-configuration at runtime (re-attachment of any FIMC
[all …]
/Documentation/devicetree/bindings/pci/
Dralink,rt3883-pci.txt7 - compatible: must be "ralink,rt3883-pci"
9 - reg: specifies the physical base address of the controller and
12 - #address-cells: specifies the number of cells needed to encode an
15 - #size-cells: specifies the number of cells used to represent the size
18 - ranges: specifies the translation between child address space and parent
23 - status: indicates the operational status of the device.
26 2) Child nodes
28 The main node must have two child nodes which describes the built-in
35 - interrupt-controller: identifies the node as an interrupt controller
37 - #address-cells: specifies the number of cells needed to encode an
[all …]
/Documentation/devicetree/bindings/powerpc/fsl/
Draideng.txt1 * Freescale 85xx RAID Engine nodes
3 RAID Engine nodes are defined to describe on-chip RAID accelerators. Each RAID
11 - compatible: Should contain "fsl,raideng-v1.0" as the value
15 - reg: offset and length of the register set for the device
16 - ranges: standard ranges property specifying the translation
22 compatible = "fsl,raideng-v1.0";
23 #address-cells = <1>;
24 #size-cells = <1>;
30 There must be a sub-node for each job queue present in RAID Engine
31 This node must be a sub-node of the main RAID Engine node
[all …]
/Documentation/devicetree/bindings/regulator/
Dpalmas-pmic.txt11 - compatible : Should be from the list
12 ti,twl6035-pmic
13 ti,twl6036-pmic
14 ti,twl6037-pmic
15 ti,tps65913-pmic
16 ti,tps65914-pmic
17 ti,tps65917-pmic
18 ti,tps659038-pmic
20 ti,palmas-pmic
21 - interrupts : The interrupt number and the type which can be looked up here:
[all …]
Das3722-regulator.txt5 --------------------
7 regulator node. The AS3722 is having 7 DCDC step-down regulators as
8 sd[0-6], 10 LDOs as ldo[0-7], ldo[9-11]. The input supply of these
10 vsup-sd2-supply: Input supply for SD2.
11 vsup-sd3-supply: Input supply for SD3.
12 vsup-sd4-supply: Input supply for SD4.
13 vsup-sd5-supply: Input supply for SD5.
14 vin-ldo0-supply: Input supply for LDO0.
15 vin-ldo1-6-supply: Input supply for LDO1 and LDO6.
16 vin-ldo2-5-7-supply: Input supply for LDO2, LDO5 and LDO7.
[all …]
/Documentation/devicetree/bindings/misc/
Dfsl,qoriq-mc.txt3 The Freescale Management Complex (fsl-mc) is a hardware resource
5 network-oriented packet processing applications. After the fsl-mc
12 For an overview of the DPAA2 architecture and fsl-mc bus see:
16 same hardware "isolation context" and a 10-bit value called an ICID
21 between ICIDs and IOMMUs, so an iommu-map property is used to define
28 For arm-smmu binding, see:
32 The msi-map property is used to associate the devices with both the ITS
36 Documentation/devicetree/bindings/interrupt-controller/msi.txt.
39 Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml.
43 - compatible
[all …]

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