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/Documentation/networking/dsa/ |
D | dsa.rst | 5 This document describes the **Distributed Switch Architecture (DSA)** subsystem 13 The Distributed Switch Architecture is a subsystem which was primarily designed 19 they configured/queried a switch port network device or a regular network 22 An Ethernet switch is typically comprised of multiple front-panel ports, and one 25 receiving Ethernet frames from the switch. This is a very common setup for all 34 of multiple switches connected to each other is called a "switch tree". 41 The ideal case for using DSA is when an Ethernet switch supports a "switch tag" 42 which is a hardware feature making the switch insert a specific tag for each 57 - the "cpu" port is the Ethernet switch facing side of the management 65 Switch tagging protocols [all …]
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D | bcm_sf2.rst | 2 Broadcom Starfighter 2 Ethernet switch driver 5 Broadcom's Starfighter 2 Ethernet switch hardware block is commonly found and 12 The switch is typically deployed in a configuration involving between 5 to 13 21 The switch also supports specific congestion control features which allow MoCA 26 The switch hardware block is typically interfaced using MMIO accesses and 29 - ``SWITCH_CORE``: common switch registers 30 - ``SWITCH_REG``: external interfaces switch register 45 The SF2 switch is configured to enable a Broadcom specific 4-bytes switch tag 46 which gets inserted by the switch for every packet forwarded to the CPU 60 device_node pointers which are then accessible by the switch driver setup [all …]
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D | sja1105.rst | 2 NXP SJA1105 switch driver 57 switch except for very few exceptions). 62 If that changed setting can be transmitted to the switch through the dynamic 63 reconfiguration interface, it is; otherwise the switch is reset and 70 protocols" for switch control as STP and PTP. For these, the switches have two 74 functionality. For frames trapped to the CPU, source port and switch ID 82 with the switch: 90 switch net devices. The other packets can be still by user space processed 94 switch named ``best_effort_vlan_filtering`` is set to ``true``. When 101 the switch net devices: [all …]
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/Documentation/ABI/testing/ |
D | sysfs-driver-bd9571mwv-regulator | 10 A. With a momentary power switch (or pulse signal), DDR 13 B. With a toggle power switch (or level signal), the 17 the accessory power switch from a power switch to a 18 wake-up switch, 19 2. Switch accessory power switch off, to prepare for 23 4. Switch accessory power switch on, to resume the
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D | sysfs-bus-i2c-devices-fsa9480 | 15 What: /sys/bus/i2c/devices/.../switch 19 show or set the state of manual switch 22 VAUDIO switch to VAUDIO path 23 UART switch to UART path 24 AUDIO switch to AUDIO path 25 DHOST switch to DHOST path 26 AUTO switch automatically by device
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/Documentation/devicetree/bindings/misc/ |
D | hisilicon-hikey-usb.yaml | 15 role-switch intermediary to detect the state of the USB-C 16 port, to switch the hub into dual-role USB-C or host mode, 31 otg-switch-gpios: 33 description: phandle to the otg-switch gpio 39 usb-role-switch: 41 description: Support role switch. 46 using the OF graph bindings specified, if the "usb-role-switch" 50 role switch. 56 - otg-switch-gpios 58 - usb-role-switch [all …]
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/Documentation/devicetree/bindings/net/ |
D | brcm,bcm7445-switch-v4.0.txt | 6 "brcm,bcm7445-switch-v4.0" 7 "brcm,bcm7278-switch-v4.0" 8 "brcm,bcm7278-switch-v4.8" 23 The integrated switch subnode should be specified according to the binding 35 switch 38 by the switch 40 - brcm,fcb-pause-override: boolean property, if present indicates that the switch 43 - brcm,acb-packets-inflight: boolean property, if present indicates that the switch 45 switch queue 51 the value "switch" to denote the switch reset line. [all …]
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D | mscc-ocelot.txt | 1 Microsemi Ocelot network Switch 4 The Microsemi Ocelot network switch can be found on Microsemi SoCs (VSC7513, 8 - compatible: Should be "mscc,vsc7514-switch" 19 switch 20 - interrupts: Should contain the switch interrupts for frame extraction, 24 - ethernet-ports: A container for child nodes representing switch ports. 34 - reg: Describes the port address in the switch 44 switch@1010000 { 45 compatible = "mscc,vsc7514-switch";
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D | ti,cpsw-switch.yaml | 4 $id: http://devicetree.org/schemas/net/ti,cpsw-switch.yaml# 7 title: TI SoC Ethernet Switch Controller (CPSW) Device Tree Bindings 14 The 3-port switch gigabit ethernet subsystem provides ethernet packet 15 communication and can be configured as an ethernet switch. It provides the 24 - const: ti,cpsw-switch 26 - const: ti,am335x-cpsw-switch 27 - const: ti,cpsw-switch 29 - const: ti,am4372-cpsw-switch 30 - const: ti,cpsw-switch 32 - const: ti,dra7-cpsw-switch [all …]
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D | hisilicon-hns-nic.txt | 26 In Switch mode of DSAF, all 6 PHYs are taken as physical ports connect to a 27 LAN Switch while the CPU side assume itself have one single NIC connect to 28 this switch. In this case, the port-id will be 2 only. 34 port | switch | 53 In Switch mode of DSAF, all 6 PHYs of service DSAF are taken as physical 54 ports connected to a LAN Switch while the CPU side assume itself have one 55 single NIC connected to this switch. In this case, the port-idx-in-ae 62 port port | switch |
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D | keystone-netcp.txt | 6 switch sub-module to send and receive packets. NetCP also includes a packet 13 includes a 3-port Ethernet switch sub-module capable of 10Gb/s and 1Gb/s rates 19 mandatory to have the ethernet switch sub-module for the ethernet interface to 29 | |-> GBE/XGBE Switch 65 1Gb/10Gb (gbe/xgbe) ethernet switch sub-module specifications. 77 - switch subsystem registers 79 - switch module registers 83 index #0 - switch subsystem registers 85 index #2 - switch module registers 88 index #0 - switch subsystem registers [all …]
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/Documentation/devicetree/bindings/net/dsa/ |
D | dsa.yaml | 7 title: Ethernet Switch Device Tree Bindings 23 pattern: "^switch(@.*)?$" 30 cluster a switch takes. <0 0> is cluster 0, switch 0. <0 1> is cluster 0, 31 switch 1. <1 0> is cluster 1, switch 0. A switch not part of any cluster 47 description: Ethernet switch ports 61 Should be a list of phandles to other switch's DSA port. This 70 device is what the switch port is connected to
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D | marvell.txt | 1 Marvell DSA Switch Device Tree Bindings 17 which is at a different MDIO base address in different switch families. 18 - "marvell,mv88e6085" : Switch has base address 0x10. Use with models: 22 - "marvell,mv88e6190" : Switch has base address 0x00. Use with models: 24 - "marvell,mv88e6250" : Switch has base address 0x08 or 0x18. Use with model: 31 - reg : Address on the MII bus for the switch. 36 - interrupts : Interrupt from the switch 37 - interrupt-controller : Indicates the switch is itself an interrupt 41 switch. Must be set if the switch can not detect 60 switch0: switch@0 { [all …]
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D | b53.txt | 6 - compatible: For external switch chips, compatible string must be exactly one 20 For the BCM5310x SoCs with an integrated switch, must be one of: 27 For the BCM5831X/BCM1140x SoCs with an integrated switch, must be one of: 35 For the BCM585xx/586XX/88312 SoCs with an integrated switch, must be one of: 44 For the BCM63xx/33xx SoCs with an integrated switch, must be one of: 45 "brcm,bcm3384-switch" 46 "brcm,bcm6328-switch" 47 "brcm,bcm6368-switch" and the mandatory "brcm,bcm63xx-switch" 52 Switch Register Access block base, the second is the port 5/4 mux 90 Ethernet switch connected via MDIO to the host, CPU port wired to eth0: [all …]
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D | vitesse,vsc73xx.txt | 4 This defines device tree bindings for the Vitesse VSC73xx switch chips. 8 The currently supported switch chips are: 9 Vitesse VSC7385 SparX-G5 5+1-port Integrated Gigabit Ethernet Switch 10 Vitesse VSC7388 SparX-G8 8-port Integrated Gigabit Ethernet Switch 11 Vitesse VSC7395 SparX-G5e 5+1-port Integrated Gigabit Ethernet Switch 12 Vitesse VSC7398 SparX-G8e 8-port Integrated Gigabit Ethernet Switch 14 This switch could have two different management interface. 30 - gpio-controller: indicates that this switch is also a GPIO controller, 48 switch@0 { 91 switch@2,0 {
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D | lan9303.txt | 1 SMSC/MicroChip LAN9303 three port ethernet switch 18 The integrated switch subnode should be specified according to the binding 19 described in dsa/dsa.txt. The CPU port of this switch is always port 0. 37 switch: switch@a { 68 phy-handle = <&switch>; 74 switch: switch-phy@0 {
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D | ar9331.txt | 1 Atheros AR9331 built-in switch 4 It is a switch built-in to Atheros AR9331 WiSoC and addressable over internal 9 - compatible: should be: "qca,ar9331-switch" 10 - reg: Address on the MII bus for the switch. 12 - reset-names : Must include the following entries: "switch" 14 - interrupts: IRQ line for the switch 15 - interrupt-controller: Indicates the switch is itself an interrupt 58 switch10: switch@10 { 62 compatible = "qca,ar9331-switch"; 65 reset-names = "switch";
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D | ocelot.txt | 1 Microchip Ocelot switch driver family 12 The VSC9959 switch is found in the NXP LS1028A. It is a PCI device, part of the 13 larger ENETC root complex. As a result, the ethernet-switch node is a sub-node 25 For the external switch ports, depending on board configuration, "phy-mode" and 34 use case. Moving the NPI port to an external switch port is hardware possible, 41 switch port is enabled at all, the ENETC PF2 (enetc_port2) should be enabled as 65 ethernet-switch@0,5 { 123 The VSC9953 switch is found inside NXP T1040. It is a platform device with the 127 Must be "mscc,vsc9953-switch". 139 ethernet-switch@800000 { [all …]
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/Documentation/sound/cards/ |
D | cmipci.rst | 30 The rear output can be heard only when "Four Channel Mode" switch is 35 When "Four Channel Mode" switch is off, the output from rear speakers 38 before your turn off this switch. 51 control switch in the driver "Line-In As Rear", which you can change 52 via alsamixer or somewhat else. When this switch is on, line-in jack 56 The "Exchange DAC" switch is used to exchange front and rear playback 136 To enable SPDIF output, you need to turn on "IEC958 Output Switch" 141 from line-out with "IEC958 In Monitor" switch at any time (see 147 off. (Also don't forget to turn on "IEC958 Output Switch", too.) 154 output through SPDIF. This switch appears only on old chip [all …]
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/Documentation/networking/devlink/ |
D | sja1105.rst | 27 - Can terminate untagged traffic over switch net 30 - Can terminate VLAN-tagged traffic over switch net 42 switch receives frames with such VIDs, it will 44 - Switch uses Shared VLAN Learning (FDB lookup uses 49 rules per switch.
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D | ti-cpsw-switch.rst | 4 ti-cpsw-switch devlink support 7 This document describes the devlink features implemented by the ``ti-cpsw-switch`` 13 The ``ti-cpsw-switch`` driver implements the following driver-specific 31 - Enable switch mode
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/Documentation/networking/ |
D | switchdev.rst | 5 Ethernet switch device driver model (switchdev) 13 The Ethernet switch device driver model (switchdev) is an in-kernel driver 14 model for switch devices which offload the forwarding (data) plane from the 18 an example setup using a data-center-class switch ASIC chip. Other setups 41 | Switch driver | | mgmt | 50 | Switch device (sw1) | 81 Switch Ports 85 struct net_device (using register_netdev()) for each enumerated physical switch 91 provide to the user access to the physical properties of the switch port such 94 There is (currently) no higher-level kernel object for the switch beyond the [all …]
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/Documentation/driver-api/rapidio/ |
D | rapidio.rst | 52 A RapidIO device is any endpoint (other than mport) or switch in the network. 57 2.3 Switch 60 A RapidIO switch is a special class of device that routes packets between its 62 switch is defined by an internal routing table. A switch is presented in the 64 data structure, which contains switch specific information such as copy of the 65 routing table and pointers to switch specific functions. 68 specific switch drivers that are designed to provide hardware-specific 69 implementation of common switch management routines. 74 A RapidIO network is a combination of interconnected endpoint and switch devices. 196 NOTE: If RapidIO switch-specific device drivers are built as loadable modules [all …]
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/Documentation/networking/device_drivers/ethernet/ti/ |
D | cpsw_switchdev.rst | 34 to the same bridge, but without enabling "switch" mode, or to different 43 platform/48484000.switch 46 platform/48484000.switch: 57 See Documentation/networking/devlink/ti-cpsw-switch.rst 81 Enabling "switch" 84 The Switch mode can be enabled by configuring devlink driver parameter 87 devlink dev param set platform/48484000.switch \ 92 overwriting of bridge configuration as CPSW switch driver copletly reloads its 95 When the both interfaces joined the bridge - CPSW switch driver will enable 105 devlink dev param set platform/48484000.switch \ [all …]
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/Documentation/admin-guide/device-mapper/ |
D | switch.rst | 2 dm-switch 5 The device-mapper switch target creates a device that supports an 48 Using this device-mapper switch target we can now build a two-layer 61 The upper tier consists of a single dm-switch device. This device uses 124 Create a switch device with 64kB region size:: 126 dmsetup create switch --table "0 `blockdev --getsz /dev/vg1/switch0` 127 switch 3 128 0 /dev/vg1/switch0 0 /dev/vg1/switch1 0 /dev/vg1/switch2 0" 132 dmsetup message switch 0 set_region_mappings 0:0 :1 :2 :0 :1 :2 :1 136 dmsetup message switch 0 set_region_mappings 1000:1 :2 R2,10 140 dmsetup message switch 0 set_region_mappings 1000:1 :2 :1 :2 :1 :2 :1 :2 \
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