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/Documentation/devicetree/bindings/leds/backlight/
Dqcom-wled.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/leds/backlight/qcom-wled.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
11 - Kiran Gunda <kgunda@codeaurora.org>
21 - qcom,pm8941-wled
22 - qcom,pmi8998-wled
23 - qcom,pm660l-wled
24 - qcom,pm8150l-wled
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/Documentation/devicetree/bindings/regulator/
Dmps,mpq7920.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Saravanan Sekar <sravanhome@gmail.com>
14 pattern: "pmic@[0-9a-f]{1,2}"
17 - mps,mpq7920
28 after their hardware counterparts BUCK[1-4], one LDORTC, and LDO[2-5]
31 mps,switch-freq:
36 switching frequency must be one of following corresponding value
40 "^ldo[1-4]$":
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/Documentation/devicetree/bindings/mfd/
Daxp20x.txt4 axp152 (X-Powers)
5 axp202 (X-Powers)
6 axp209 (X-Powers)
7 axp221 (X-Powers)
8 axp223 (X-Powers)
9 axp803 (X-Powers)
10 axp806 (X-Powers)
11 axp809 (X-Powers)
12 axp813 (X-Powers)
20 - compatible: should be one of:
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/Documentation/devicetree/bindings/opp/
Dopp.txt2 ----------------------------------------------------
4 Devices work at voltage-current-frequency combinations and some implementations
13 Binding 1: operating-points
16 This binding only supports voltage-frequency pairs.
19 - operating-points: An array of 2-tuples items, and each item consists
20 of frequency and voltage like <freq-kHz vol-uV>.
21 freq: clock frequency in kHz
27 compatible = "arm,cortex-a9";
29 next-level-cache = <&L2>;
30 operating-points = <
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/Documentation/admin-guide/pm/
Dintel_pstate.rst1 .. SPDX-License-Identifier: GPL-2.0
24 For the processors supported by ``intel_pstate``, the P-state concept is broader
27 information about that). For this reason, the representation of P-states used
32 ``intel_pstate`` maps its internal representation of P-states to frequencies too
38 Since the hardware P-state selection interface used by ``intel_pstate`` is
43 time the corresponding CPU is taken offline and need to be re-initialized when
47 only way to pass early-configuration-time parameters to it is via the kernel
66 -----------
69 hardware-managed P-states (HWP) support. If it works in this mode, the
74 provides its own scaling algorithms for P-state selection. Those algorithms
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