Searched full:syscfg (Results 1 – 25 of 25) sorted by relevance
| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | st,sti-irq-syscfg.txt | 10 "st,stih415-irq-syscfg"
11 "st,stih416-irq-syscfg"
12 "st,stih407-irq-syscfg"
13 "st,stid127-irq-syscfg"
14 - st,syscfg : Phandle to Cortex-A9 IRQ system config registers
27 irq-syscfg {
28 compatible = "st,stih416-irq-syscfg";
29 st,syscfg = <&syscfg_cpu>;
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| /Documentation/devicetree/bindings/arm/stm32/ |
| D | st,stm32-syscon.yaml | 18 - st,stm32mp157-syscfg
20 - st,stm32-syscfg
39 - st,stm32mp157-syscfg
49 syscfg: syscon@50020000 {
50 compatible = "st,stm32mp157-syscfg", "syscon";
52 clocks = <&rcc SYSCFG>;
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| /Documentation/devicetree/bindings/power/reset/ |
| D | st-reset.txt | 5 - st,syscfg: should be a phandle of the syscfg node.
10 st,syscfg = <&syscfg_sbc_reg>;
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| /Documentation/devicetree/bindings/regulator/ |
| D | st,stm32-booster.yaml | 25 st,syscfg:
34 - st,syscfg
43 st,syscfg = <&syscfg>;
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| /Documentation/devicetree/bindings/remoteproc/ |
| D | st,stm32-rproc.yaml | 30 st,syscfg-holdboot:
38 st,syscfg-tz:
90 st,syscfg-pdds:
109 - st,syscfg-holdboot
110 - st,syscfg-tz
123 st,syscfg-holdboot = <&rcc 0x10C 0x1>;
124 st,syscfg-tz = <&rcc 0x000 0x1>;
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| D | st-rproc.txt | 20 - st,syscfg System configuration register which holds the boot vector
40 st,syscfg = <&syscfg_core 0x228>;
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| /Documentation/devicetree/bindings/i2c/ |
| D | st,stm32-i2c.yaml | 29 st,syscfg-fmp:
30 description: Use to set Fast Mode Plus bit within SYSCFG when
32 Format is phandle to syscfg / register offset within
33 syscfg / register bitmask for FMP bit.
142 st,syscfg-fmp = <&syscfg 0x4 0x2>;
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| /Documentation/devicetree/bindings/phy/ |
| D | phy-miphy28lp.txt | 9 - st,syscfg : Should be a phandle of the system configuration register group
29 - st,syscfg : Offset of the parent configuration register.
50 st,syscfg = <&syscfg_core>;
63 st,syscfg = <0x114 0x818 0xe0 0xec>;
78 st,syscfg = <0x118 0x81c 0xe4 0xf0>;
92 st,syscfg = <0x11c 0x820>;
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| D | phy-stih407-usb.txt | 8 - st,syscfg : phandle of sysconfig bank plus integer array containing phyparam and phyctrl registe…
20 st,syscfg = <&syscfg_core 0x100 0xf4>;
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| D | intel,combo-phy.yaml | 48 intel,syscfg:
75 - intel,syscfg
97 intel,syscfg = <&sysconf 0>;
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| D | phy-miphy365x.txt | 9 - st,syscfg : Phandle / integer array property. Phandle of sysconfig group
43 st,syscfg = <&syscfg_rear 0x824 0x828>;
57 reg-names = "sata", "pcie", "syscfg";
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| /Documentation/devicetree/bindings/watchdog/ |
| D | st_lpc_wdt.txt | 24 - st,syscfg : Phandle to syscfg node used to enable watchdog and configure
37 st,syscfg = <&syscfg_core>;
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| /Documentation/devicetree/bindings/usb/ |
| D | dwc3-st.txt | 9 - reg : glue logic base address and USB syscfg ctrl register offset
10 - reg-names : should be "reg-glue" and "syscfg-reg"
47 reg-names = "reg-glue", "syscfg-reg";
48 st,syscfg = <&syscfg_core>;
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| /Documentation/devicetree/bindings/rtc/ |
| D | st,stm32-rtc.yaml | 34 st,syscfg:
71 - st,syscfg
87 - st,syscfg
127 st,syscfg = <&pwrcfg 0x00 0x100>;
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| /Documentation/devicetree/bindings/sound/ |
| D | st,sti-asoc-card.txt | 18 - st,syscfg: phandle to boot-device system configuration registers
57 st,syscfg = <&syscfg_core>;
69 st,syscfg = <&syscfg_core>;
80 st,syscfg = <&syscfg_core>;
91 st,syscfg = <&syscfg_core>;
105 - st,syscfg: phandle to boot-device system configuration registers.
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | pinctrl-mt65xx.txt | 36 - mediatek,pctl-regmap: Should be a phandle of the syscfg node.
81 syscfg_pctl_a: syscfg-pctl-a@10005000 {
82 compatible = "mediatek,mt8135-pctl-a-syscfg", "syscon";
86 syscfg_pctl_b: syscfg-pctl-b@1020c020 {
87 compatible = "mediatek,mt8135-pctl-b-syscfg", "syscon";
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| D | pinctrl-st.txt | 34 - st,syscfg : Should be a phandle of the syscfg node.
85 st,syscfg = <&syscfg_sbc>;
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| D | st,stm32-pinctrl.yaml | 42 st,syscfg:
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| /Documentation/devicetree/bindings/mtd/ |
| D | st-fsm.txt | 11 - st,syscfg : Phandle to boot-device system configuration registers
21 st,syscfg = <&syscfg_rear>;
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| /Documentation/devicetree/bindings/net/ |
| D | stm32-dwmac.yaml | 116 st,syscon = <&syscfg 0x4>;
132 st,syscon = <&syscfg 0x4>;
147 st,syscon = <&syscfg 0x4>;
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| /Documentation/devicetree/bindings/clock/ |
| D | st,stm32h7-rcc.txt | 26 - st,syscfg: phandle for pwrcfg, mandatory to disable/enable backup domain
38 st,syscfg = <&pwrcfg>;
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| /Documentation/devicetree/bindings/iio/adc/ |
| D | st,stm32-adc.yaml | 75 st,syscfg:
120 st,syscfg: false
152 st,syscfg: false
432 st,syscfg = <&syscfg>;
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| /Documentation/devicetree/bindings/dma/ |
| D | st_fdma.txt | 73 st,syscfg = <&syscfg_core>;
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| /Documentation/devicetree/bindings/display/ |
| D | st,stih4xx.txt | 194 reg-names = "tvout-reg", "hda-reg", "syscfg";
202 reg-names = "hdmi-reg", "syscfg";
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| /Documentation/networking/device_drivers/ethernet/stmicro/ |
| D | stmmac.rst | 434 24) This callback is used for modifying some syscfg registers (on ST SoCs)
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