Searched full:timers (Results 1 – 25 of 100) sorted by relevance
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| /Documentation/devicetree/bindings/timer/ |
| D | mediatek,mtk-timer.txt | 1 MediaTek Timers
4 MediaTek SoCs have two different timers on different platforms,
13 * "mediatek,mt2701-timer" for MT2701 compatible timers (GPT)
14 * "mediatek,mt6580-timer" for MT6580 compatible timers (GPT)
15 * "mediatek,mt6589-timer" for MT6589 compatible timers (GPT)
16 * "mediatek,mt7623-timer" for MT7623 compatible timers (GPT)
17 * "mediatek,mt8127-timer" for MT8127 compatible timers (GPT)
18 * "mediatek,mt8135-timer" for MT8135 compatible timers (GPT)
19 * "mediatek,mt8173-timer" for MT8173 compatible timers (GPT)
20 * "mediatek,mt8516-timer" for MT8516 compatible timers (GPT)
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| D | ti,davinci-timer.txt | 5 timer, dual general-purpose 32-bit timers. When configured as dual 32-bit
6 timers, each half can operate in conjunction (chain mode) or independently
12 Also see ../watchdog/davinci-wdt.txt for timers that are configurable as
13 watchdog timers.
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| D | andestech,atcpit100-timer.txt | 6 This timer is a set of compact multi-function timers, which can be
7 used as pulse width modulators (PWM) as well as simple timers.
12 Two 16-bit timers
13 Four 8-bit timers
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| D | spreadtrum,sprd-timer.txt | 1 Spreadtrum timers
3 The Spreadtrum SC9860 platform provides 3 general-purpose timers.
4 These timers can support 32bit or 64bit counter, as well as supporting
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| D | samsung,exynos4210-mct.yaml | 14 global timer and CPU local timers. The global timer is a 64-bit free running
16 four preset counter values. The CPU local timers are 32-bit free running
52 For MCT block that uses a per-processor interrupt for local timers, such
54 interrupt might be specified, meaning that all local timers use the same
70 // In this example, the IP contains two local timers, using separate
111 // In this example, the IP contains four local timers, but using
131 // In this example, the IP contains four local timers, but using
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| D | marvell,armada-370-xp-timer.txt | 1 Marvell Armada 370 and Armada XP Timers
11 - reg: Should contain location and length for timers register. First
13 local/private timers.
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| D | ti,keystone-timer.txt | 5 timer, dual general-purpose 32-bit timers. When configured as dual 32-bit
6 timers, each half can operate in conjunction (chain mode) or independently
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| D | arm,sp804.yaml | 7 title: ARM sp804 Dual Timers
13 The Arm SP804 IP implements two independent timers, configurable for
65 - description: unified clock for both timers and the bus
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| /Documentation/timers/ |
| D | hrtimers.rst | 2 hrtimers - subsystem for high-resolution kernel timers
5 This patch introduces a new subsystem for high-resolution kernel timers.
8 (kernel/timers.c), why do we need two timer subsystems? After a lot of
18 - the forced handling of low-resolution and high-resolution timers in
20 mess. The timers.c code is very "tightly coded" around jiffies and
27 high-res timers.
30 necessitate a more complex handling of high resolution timers, which
34 degrading other portions of the timers.c code in an unacceptable way.
38 the required readjusting of absolute CLOCK_REALTIME timers at
41 timers.
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| D | hpet.rst | 12 also called "timers", which can be misleading since usually timers are
19 mode where the first two comparators block interrupts from 8254 timers
30 file:samples/timers/hpet_example.c
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| D | index.rst | 4 timers title
15 timers-howto
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| D | highres.rst | 2 High resolution timers and dynamic ticks design notes
34 the base implementation are covered in Documentation/timers/hrtimers.rst. See
38 timers are:
64 Timers" was written by J. Stultz, D.V. Hart, & N. Aravamudan.
82 functionality like high resolution timers or dynamic ticks.
102 accounting, profiling, and high resolution timers.
134 enabling of high resolution timers and dynamic ticks is simply provided by
156 configured for high resolution timers can run on a system which lacks the
167 The time ordered insertion of timers provides all the infrastructure to decide
175 from the clock event distribution code and moves expired timers from the
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| D | timekeeping.rst | 2 Clock sources, Clock events, sched_clock() and delay timers
13 delay timers.
17 on this timeline, providing facilities such as high-resolution timers.
18 sched_clock() is used for scheduling and timestamping, and delay timers
160 Delay timers (some architectures only)
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| /Documentation/devicetree/bindings/pwm/ |
| D | pwm-omap-dmtimer.txt | 1 * OMAP PWM for dual-mode timers
5 - ti,timers: phandle to PWM capable OMAP timer. See timer/ti,timer.txt for info
6 about these timers.
11 - ti,prescaler: Should be a value between 0 and 7, see the timers datasheet
20 ti,timers = <&timer9>;
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| D | pwm-samsung.yaml | 7 title: Samsung SoC PWM timers
15 and clock event timers, as well as to drive SoC outputs with PWM signal. Each
40 - "timers" - PWM base clock used to generate PWM signals,
49 - const: timers
51 - const: timers
54 - const: timers
57 - const: timers
118 clock-names = "timers";
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| /Documentation/devicetree/bindings/mips/brcm/ |
| D | soc.txt | 145 == Timers
148 timers that can be used.
153 "brcm,bcm7425-timers"
154 "brcm,bcm7429-timers"
155 "brcm,bcm7435-timers" and
156 "brcm,brcmstb-timers"
157 - reg : the timers register range
162 timers: timer@4067c0 {
163 compatible = "brcm,bcm7425-timers", "brcm,brcmstb-timers";
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| /Documentation/devicetree/bindings/mfd/ |
| D | st,stm32-timers.yaml | 4 $id: http://devicetree.org/schemas/mfd/st,stm32-timers.yaml#
7 title: STMicroelectronics STM32 Timers bindings
11 - advanced-control timers consist of a 16-bit auto-reload counter driven
14 - general-purpose timers consist of a 16-bit or 32-bit auto-reload counter
16 - basic timers consist of a 16-bit auto-reload counter driven by a
25 const: st,stm32-timers
134 timers2: timers@40000000 {
137 compatible = "st,stm32-timers";
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| /Documentation/devicetree/bindings/remoteproc/ |
| D | ti,omap-remoteproc.yaml | 37 'timers', 'watchdog-timers' etc.
139 ti,timers:
143 as System/Tick timers for the OS running on the remote
147 to reserve specific timers to be dedicated to the
152 features. The timers to be used should match with the
153 timers used in the firmware image.
155 ti,watchdog-timers:
159 serve as Watchdog timers for the processor cores. This
163 The timers to be used should match with the watchdog
164 timers used in the firmware image.
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| /Documentation/devicetree/bindings/powerpc/fsl/ |
| D | mpic-timer.txt | 1 * Freescale MPIC timers
12 all timers within the group can be used.
16 interrupts that correspond to available timers shall be present.
24 /* Another AMP partition is using timers 0 and 1 */
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| /Documentation/devicetree/bindings/arm/ |
| D | picoxcell.txt | 11 Timers required properties:
17 Note: two timers are required - one for the scheduler clock and one for the
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| /Documentation/devicetree/bindings/x86/ |
| D | timer.txt | 1 Timers
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| /Documentation/devicetree/bindings/input/ |
| D | pwm-vibrator.txt | 45 ti,timers = <&timer8>;
55 ti,timers = <&timer9>;
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| /Documentation/devicetree/bindings/watchdog/ |
| D | mt7621-wdt.txt | 1 Ralink Watchdog Timers
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| D | rt2880-wdt.txt | 1 Ralink Watchdog Timers
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| /Documentation/devicetree/bindings/leds/ |
| D | leds-netxbig.txt | 9 - timers: Timer array. Each timer entry is represented by three integers:
32 timers = <NETXBIG_LED_TIMER1 500 500
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