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/Documentation/scheduler/
Dcompletion.rst39 - the waiting part through a call to one of the variants of wait_for_completion(),
79 variants of wait_for_completion(), as it must be assured that memory de-allocation
125 To emphasise this again: in particular when using some of the waiting API variants
127 _killable() and _interruptible()) variants, the wait might complete
174 uninterruptible. wait_for_completion() and its variants are only safe
180 As all variants of wait_for_completion() can (obviously) block for a long
185 wait_for_completion*() variants available:
188 The below variants all return status and this status should be checked in
228 Further variants include _killable which uses TASK_KILLABLE as the
235 The _io variants wait_for_completion_io() behave the same as the non-_io
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/Documentation/devicetree/bindings/interrupt-controller/
Dopencores,or1k-pic.txt5 - compatible : should be "opencores,or1k-pic-level" for variants with
6 level triggered interrupt lines, "opencores,or1k-pic-edge" for variants with
Dcdns,xtensa-pic.txt12 core variants it may be mapped to different internal IRQ.
Dst,spear3xx-shirq.txt7 There can be multiple groups available on SPEAr3xx variants but not
/Documentation/fb/
Ds3fb.rst10 S3 Trio64 (and variants V+, UV+, V2/DX, V2/GX)
11 S3 Virge (and variants VX, DX, GX and GX2+)
26 * 4 bpp pseudocolor modes (with 18bit palette, two variants)
/Documentation/devicetree/bindings/arm/
Darm,versatile.yaml13 The ARM Versatile boards are two variants of ARM926EJ-S evaluation boards
39 0x10000000 in all the Versatile variants.
Dmicrochip,sparx5.yaml52 0x600000000 in all the Sparx5 variants.
/Documentation/core-api/
Dtimekeeping.rst12 The recommended simplest form returns an opaque ktime_t, with variants
62 For all of the above, there are variants that return the time in a
100 Some additional variants exist for more specialized cases:
137 These variants are safe to call from any context, including from
Dboot-time-mm.rst18 particular node in a NUMA system. There are API variants that panic
/Documentation/devicetree/bindings/usb/
Dbrcm,bcm3384-usb.txt11 - Figuring out which controllers are disabled on ASIC bondout variants
Dehci-orion.txt1 * EHCI controller, Orion Marvell variants
/Documentation/x86/
Dmds.rst10 on internal buffers in Intel CPUs. The variants are:
73 All variants have the same mitigation strategy at least for the single CPU
166 and not by any other MDS variant. The other MDS variants cannot be
168 the Load Ports are shared. So on CPUs affected by other variants, the
187 The mitigation is hooked into all variants of halt()/mwait(), but does
/Documentation/hwmon/
Dintel-m10-bmc-hwmon.rst28 reprogramed to some variants in order to support different Intel
30 variants, but now it only supports the BMC for Intel PAC N3000.
Demc2103.rst33 The 2103-2 and 2103-4 variants have a third temperature sensor, which can
/Documentation/
Dasm-annotations.rst111 architecture specific ``__ALIGN`` bytes. There are also ``_NOALIGN`` variants
149 one. ``_NOALIGN`` variants exist too. The use is the same as for the ``FUNC``
194 * ``SYM_DATA`` and ``SYM_DATA_LOCAL`` are variants for simple, mostly one-line
211 symbol marked by them. They are used either in ``_LABEL`` variants of the
/Documentation/RCU/
Drcu.rst42 Preemptible variants of RCU (CONFIG_PREEMPT_RCU) get the
47 critical sections. These variants of RCU detect grace periods
/Documentation/admin-guide/hw-vuln/
Dmds.rst26 Not all processors are affected by all variants of MDS, but the mitigation
161 other variants cannot be protected against cross Hyper-Thread attacks.
219 cross Hyper-Threads when entering idle states. Some XEON PHI variants allow
224 XEON PHI is not affected by the other MDS variants and MSBDS is mitigated
233 All MDS variants except MSBDS can be attacked cross Hyper-Threads. That
/Documentation/devicetree/bindings/mtd/partitions/
Dbrcm,trx.txt21 There are two existing/known TRX variants:
/Documentation/devicetree/bindings/mfd/
Dtwl-family.txt21 - Child nodes contain in the twl. The twl family is made of several variants
/Documentation/i2c/
Dslave-eeprom-backend.rst13 variants are also supported. The name needed for instantiating has the form
/Documentation/power/regulator/
Ddesign.rst14 of the system - software-equivalent variants of the same chip may
/Documentation/devicetree/bindings/spi/
Dqcom,spi-geni-qcom.txt8 data path from 4 bits to 32 bits and numerous protocol variants.
/Documentation/userspace-api/media/rc/
Drc-sysfs-nodes.rst97 Note that protocol variants are listed, so ``nec``, ``sony``, ``rc-5``, ``rc-6``
100 Note that all protocol variants are listed.
/Documentation/devicetree/bindings/clock/
Dti-clkctrl.txt8 interconnect target module on omap4 and later variants.
/Documentation/admin-guide/pm/
Dsleep-states.rst23 hibernation and up to three variants of system suspend. The sleep states that
44 deeper system suspend variants to provide reduced resume latency. It is always
117 Hibernation is significantly different from any of the system suspend variants.
179 suspend variants and allows user space to select the variant to be

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