1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved. 3 */ 4 5 #ifndef _DPU_CORE_PERF_H_ 6 #define _DPU_CORE_PERF_H_ 7 8 #include <linux/types.h> 9 #include <linux/dcache.h> 10 #include <linux/mutex.h> 11 #include <drm/drm_crtc.h> 12 13 #include "dpu_hw_catalog.h" 14 15 #define DPU_PERF_DEFAULT_MAX_CORE_CLK_RATE 412500000 16 17 /** 18 * struct dpu_core_perf_params - definition of performance parameters 19 * @max_per_pipe_ib: maximum instantaneous bandwidth request 20 * @bw_ctl: arbitrated bandwidth request 21 * @core_clk_rate: core clock rate request 22 */ 23 struct dpu_core_perf_params { 24 u64 max_per_pipe_ib; 25 u64 bw_ctl; 26 u64 core_clk_rate; 27 }; 28 29 /** 30 * struct dpu_core_perf_tune - definition of performance tuning control 31 * @mode: performance mode 32 * @min_core_clk: minimum core clock 33 * @min_bus_vote: minimum bus vote 34 */ 35 struct dpu_core_perf_tune { 36 u32 mode; 37 u64 min_core_clk; 38 u64 min_bus_vote; 39 }; 40 41 /** 42 * struct dpu_core_perf - definition of core performance context 43 * @dev: Pointer to drm device 44 * @debugfs_root: top level debug folder 45 * @catalog: Pointer to catalog configuration 46 * @core_clk: Pointer to core clock structure 47 * @core_clk_rate: current core clock rate 48 * @max_core_clk_rate: maximum allowable core clock rate 49 * @perf_tune: debug control for performance tuning 50 * @enable_bw_release: debug control for bandwidth release 51 * @fix_core_clk_rate: fixed core clock request in Hz used in mode 2 52 * @fix_core_ib_vote: fixed core ib vote in bps used in mode 2 53 * @fix_core_ab_vote: fixed core ab vote in bps used in mode 2 54 */ 55 struct dpu_core_perf { 56 struct drm_device *dev; 57 struct dentry *debugfs_root; 58 struct dpu_mdss_cfg *catalog; 59 struct dss_clk *core_clk; 60 u64 core_clk_rate; 61 u64 max_core_clk_rate; 62 struct dpu_core_perf_tune perf_tune; 63 u32 enable_bw_release; 64 u64 fix_core_clk_rate; 65 u64 fix_core_ib_vote; 66 u64 fix_core_ab_vote; 67 }; 68 69 /** 70 * dpu_core_perf_crtc_check - validate performance of the given crtc state 71 * @crtc: Pointer to crtc 72 * @state: Pointer to new crtc state 73 * return: zero if success, or error code otherwise 74 */ 75 int dpu_core_perf_crtc_check(struct drm_crtc *crtc, 76 struct drm_crtc_state *state); 77 78 /** 79 * dpu_core_perf_crtc_update - update performance of the given crtc 80 * @crtc: Pointer to crtc 81 * @params_changed: true if crtc parameters are modified 82 * @stop_req: true if this is a stop request 83 * return: zero if success, or error code otherwise 84 */ 85 int dpu_core_perf_crtc_update(struct drm_crtc *crtc, 86 int params_changed, bool stop_req); 87 88 /** 89 * dpu_core_perf_crtc_release_bw - release bandwidth of the given crtc 90 * @crtc: Pointer to crtc 91 */ 92 void dpu_core_perf_crtc_release_bw(struct drm_crtc *crtc); 93 94 /** 95 * dpu_core_perf_destroy - destroy the given core performance context 96 * @perf: Pointer to core performance context 97 */ 98 void dpu_core_perf_destroy(struct dpu_core_perf *perf); 99 100 /** 101 * dpu_core_perf_init - initialize the given core performance context 102 * @perf: Pointer to core performance context 103 * @dev: Pointer to drm device 104 * @catalog: Pointer to catalog 105 * @core_clk: pointer to core clock 106 */ 107 int dpu_core_perf_init(struct dpu_core_perf *perf, 108 struct drm_device *dev, 109 struct dpu_mdss_cfg *catalog, 110 struct dss_clk *core_clk); 111 112 struct dpu_kms; 113 114 /** 115 * dpu_core_perf_debugfs_init - initialize debugfs for core performance context 116 * @dpu_kms: Pointer to the dpu_kms struct 117 * @debugfs_parent: Pointer to parent debugfs 118 */ 119 int dpu_core_perf_debugfs_init(struct dpu_kms *dpu_kms, struct dentry *parent); 120 121 #endif /* _DPU_CORE_PERF_H_ */ 122