1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (c) 2015, Linaro Limited 4 */ 5 #ifndef __LINUX_ARM_SMCCC_H 6 #define __LINUX_ARM_SMCCC_H 7 8 #include <linux/init.h> 9 #include <uapi/linux/const.h> 10 11 /* 12 * This file provides common defines for ARM SMC Calling Convention as 13 * specified in 14 * https://developer.arm.com/docs/den0028/latest 15 * 16 * This code is up-to-date with version DEN 0028 C 17 */ 18 19 #define ARM_SMCCC_STD_CALL _AC(0,U) 20 #define ARM_SMCCC_FAST_CALL _AC(1,U) 21 #define ARM_SMCCC_TYPE_SHIFT 31 22 23 #define ARM_SMCCC_SMC_32 0 24 #define ARM_SMCCC_SMC_64 1 25 #define ARM_SMCCC_CALL_CONV_SHIFT 30 26 27 #define ARM_SMCCC_OWNER_MASK 0x3F 28 #define ARM_SMCCC_OWNER_SHIFT 24 29 30 #define ARM_SMCCC_FUNC_MASK 0xFFFF 31 32 #define ARM_SMCCC_IS_FAST_CALL(smc_val) \ 33 ((smc_val) & (ARM_SMCCC_FAST_CALL << ARM_SMCCC_TYPE_SHIFT)) 34 #define ARM_SMCCC_IS_64(smc_val) \ 35 ((smc_val) & (ARM_SMCCC_SMC_64 << ARM_SMCCC_CALL_CONV_SHIFT)) 36 #define ARM_SMCCC_FUNC_NUM(smc_val) ((smc_val) & ARM_SMCCC_FUNC_MASK) 37 #define ARM_SMCCC_OWNER_NUM(smc_val) \ 38 (((smc_val) >> ARM_SMCCC_OWNER_SHIFT) & ARM_SMCCC_OWNER_MASK) 39 40 #define ARM_SMCCC_CALL_VAL(type, calling_convention, owner, func_num) \ 41 (((type) << ARM_SMCCC_TYPE_SHIFT) | \ 42 ((calling_convention) << ARM_SMCCC_CALL_CONV_SHIFT) | \ 43 (((owner) & ARM_SMCCC_OWNER_MASK) << ARM_SMCCC_OWNER_SHIFT) | \ 44 ((func_num) & ARM_SMCCC_FUNC_MASK)) 45 46 #define ARM_SMCCC_OWNER_ARCH 0 47 #define ARM_SMCCC_OWNER_CPU 1 48 #define ARM_SMCCC_OWNER_SIP 2 49 #define ARM_SMCCC_OWNER_OEM 3 50 #define ARM_SMCCC_OWNER_STANDARD 4 51 #define ARM_SMCCC_OWNER_STANDARD_HYP 5 52 #define ARM_SMCCC_OWNER_VENDOR_HYP 6 53 #define ARM_SMCCC_OWNER_TRUSTED_APP 48 54 #define ARM_SMCCC_OWNER_TRUSTED_APP_END 49 55 #define ARM_SMCCC_OWNER_TRUSTED_OS 50 56 #define ARM_SMCCC_OWNER_TRUSTED_OS_END 63 57 58 #define ARM_SMCCC_QUIRK_NONE 0 59 #define ARM_SMCCC_QUIRK_QCOM_A6 1 /* Save/restore register a6 */ 60 61 #define ARM_SMCCC_VERSION_1_0 0x10000 62 #define ARM_SMCCC_VERSION_1_1 0x10001 63 #define ARM_SMCCC_VERSION_1_2 0x10002 64 65 #define ARM_SMCCC_VERSION_FUNC_ID \ 66 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ 67 ARM_SMCCC_SMC_32, \ 68 0, 0) 69 70 #define ARM_SMCCC_ARCH_FEATURES_FUNC_ID \ 71 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ 72 ARM_SMCCC_SMC_32, \ 73 0, 1) 74 75 #define ARM_SMCCC_ARCH_SOC_ID \ 76 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ 77 ARM_SMCCC_SMC_32, \ 78 0, 2) 79 80 #define ARM_SMCCC_ARCH_WORKAROUND_1 \ 81 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ 82 ARM_SMCCC_SMC_32, \ 83 0, 0x8000) 84 85 #define ARM_SMCCC_ARCH_WORKAROUND_2 \ 86 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ 87 ARM_SMCCC_SMC_32, \ 88 0, 0x7fff) 89 90 #define ARM_SMCCC_ARCH_WORKAROUND_3 \ 91 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ 92 ARM_SMCCC_SMC_32, \ 93 0, 0x3fff) 94 95 #define SMCCC_ARCH_WORKAROUND_RET_UNAFFECTED 1 96 97 /* Paravirtualised time calls (defined by ARM DEN0057A) */ 98 #define ARM_SMCCC_HV_PV_TIME_FEATURES \ 99 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ 100 ARM_SMCCC_SMC_64, \ 101 ARM_SMCCC_OWNER_STANDARD_HYP, \ 102 0x20) 103 104 #define ARM_SMCCC_HV_PV_TIME_ST \ 105 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ 106 ARM_SMCCC_SMC_64, \ 107 ARM_SMCCC_OWNER_STANDARD_HYP, \ 108 0x21) 109 110 /* TRNG entropy source calls (defined by ARM DEN0098) */ 111 #define ARM_SMCCC_TRNG_VERSION \ 112 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ 113 ARM_SMCCC_SMC_32, \ 114 ARM_SMCCC_OWNER_STANDARD, \ 115 0x50) 116 117 #define ARM_SMCCC_TRNG_FEATURES \ 118 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ 119 ARM_SMCCC_SMC_32, \ 120 ARM_SMCCC_OWNER_STANDARD, \ 121 0x51) 122 123 #define ARM_SMCCC_TRNG_GET_UUID \ 124 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ 125 ARM_SMCCC_SMC_32, \ 126 ARM_SMCCC_OWNER_STANDARD, \ 127 0x52) 128 129 #define ARM_SMCCC_TRNG_RND32 \ 130 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ 131 ARM_SMCCC_SMC_32, \ 132 ARM_SMCCC_OWNER_STANDARD, \ 133 0x53) 134 135 #define ARM_SMCCC_TRNG_RND64 \ 136 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ 137 ARM_SMCCC_SMC_64, \ 138 ARM_SMCCC_OWNER_STANDARD, \ 139 0x53) 140 141 /* 142 * Return codes defined in ARM DEN 0070A 143 * ARM DEN 0070A is now merged/consolidated into ARM DEN 0028 C 144 */ 145 #define SMCCC_RET_SUCCESS 0 146 #define SMCCC_RET_NOT_SUPPORTED -1 147 #define SMCCC_RET_NOT_REQUIRED -2 148 #define SMCCC_RET_INVALID_PARAMETER -3 149 150 #ifndef __ASSEMBLY__ 151 152 #include <linux/linkage.h> 153 #include <linux/types.h> 154 155 enum arm_smccc_conduit { 156 SMCCC_CONDUIT_NONE, 157 SMCCC_CONDUIT_SMC, 158 SMCCC_CONDUIT_HVC, 159 }; 160 161 /** 162 * arm_smccc_1_1_get_conduit() 163 * 164 * Returns the conduit to be used for SMCCCv1.1 or later. 165 * 166 * When SMCCCv1.1 is not present, returns SMCCC_CONDUIT_NONE. 167 */ 168 enum arm_smccc_conduit arm_smccc_1_1_get_conduit(void); 169 170 /** 171 * arm_smccc_get_version() 172 * 173 * Returns the version to be used for SMCCCv1.1 or later. 174 * 175 * When SMCCCv1.1 or above is not present, returns SMCCCv1.0, but this 176 * does not imply the presence of firmware or a valid conduit. Caller 177 * handling SMCCCv1.0 must determine the conduit by other means. 178 */ 179 u32 arm_smccc_get_version(void); 180 181 void __init arm_smccc_version_init(u32 version, enum arm_smccc_conduit conduit); 182 183 /** 184 * struct arm_smccc_res - Result from SMC/HVC call 185 * @a0-a3 result values from registers 0 to 3 186 */ 187 struct arm_smccc_res { 188 unsigned long a0; 189 unsigned long a1; 190 unsigned long a2; 191 unsigned long a3; 192 }; 193 194 /** 195 * struct arm_smccc_quirk - Contains quirk information 196 * @id: quirk identification 197 * @state: quirk specific information 198 * @a6: Qualcomm quirk entry for returning post-smc call contents of a6 199 */ 200 struct arm_smccc_quirk { 201 int id; 202 union { 203 unsigned long a6; 204 } state; 205 }; 206 207 /** 208 * __arm_smccc_smc() - make SMC calls 209 * @a0-a7: arguments passed in registers 0 to 7 210 * @res: result values from registers 0 to 3 211 * @quirk: points to an arm_smccc_quirk, or NULL when no quirks are required. 212 * 213 * This function is used to make SMC calls following SMC Calling Convention. 214 * The content of the supplied param are copied to registers 0 to 7 prior 215 * to the SMC instruction. The return values are updated with the content 216 * from register 0 to 3 on return from the SMC instruction. An optional 217 * quirk structure provides vendor specific behavior. 218 */ 219 asmlinkage void __arm_smccc_smc(unsigned long a0, unsigned long a1, 220 unsigned long a2, unsigned long a3, unsigned long a4, 221 unsigned long a5, unsigned long a6, unsigned long a7, 222 struct arm_smccc_res *res, struct arm_smccc_quirk *quirk); 223 224 /** 225 * __arm_smccc_hvc() - make HVC calls 226 * @a0-a7: arguments passed in registers 0 to 7 227 * @res: result values from registers 0 to 3 228 * @quirk: points to an arm_smccc_quirk, or NULL when no quirks are required. 229 * 230 * This function is used to make HVC calls following SMC Calling 231 * Convention. The content of the supplied param are copied to registers 0 232 * to 7 prior to the HVC instruction. The return values are updated with 233 * the content from register 0 to 3 on return from the HVC instruction. An 234 * optional quirk structure provides vendor specific behavior. 235 */ 236 asmlinkage void __arm_smccc_hvc(unsigned long a0, unsigned long a1, 237 unsigned long a2, unsigned long a3, unsigned long a4, 238 unsigned long a5, unsigned long a6, unsigned long a7, 239 struct arm_smccc_res *res, struct arm_smccc_quirk *quirk); 240 241 #define arm_smccc_smc(...) __arm_smccc_smc(__VA_ARGS__, NULL) 242 243 #define arm_smccc_smc_quirk(...) __arm_smccc_smc(__VA_ARGS__) 244 245 #define arm_smccc_hvc(...) __arm_smccc_hvc(__VA_ARGS__, NULL) 246 247 #define arm_smccc_hvc_quirk(...) __arm_smccc_hvc(__VA_ARGS__) 248 249 /* SMCCC v1.1 implementation madness follows */ 250 #ifdef CONFIG_ARM64 251 252 #define SMCCC_SMC_INST "smc #0" 253 #define SMCCC_HVC_INST "hvc #0" 254 255 #elif defined(CONFIG_ARM) 256 #include <asm/opcodes-sec.h> 257 #include <asm/opcodes-virt.h> 258 259 #define SMCCC_SMC_INST __SMC(0) 260 #define SMCCC_HVC_INST __HVC(0) 261 262 #endif 263 264 #define ___count_args(_0, _1, _2, _3, _4, _5, _6, _7, _8, x, ...) x 265 266 #define __count_args(...) \ 267 ___count_args(__VA_ARGS__, 7, 6, 5, 4, 3, 2, 1, 0) 268 269 #define __constraint_read_0 "r" (arg0) 270 #define __constraint_read_1 __constraint_read_0, "r" (arg1) 271 #define __constraint_read_2 __constraint_read_1, "r" (arg2) 272 #define __constraint_read_3 __constraint_read_2, "r" (arg3) 273 #define __constraint_read_4 __constraint_read_3, "r" (arg4) 274 #define __constraint_read_5 __constraint_read_4, "r" (arg5) 275 #define __constraint_read_6 __constraint_read_5, "r" (arg6) 276 #define __constraint_read_7 __constraint_read_6, "r" (arg7) 277 278 #define __declare_arg_0(a0, res) \ 279 struct arm_smccc_res *___res = res; \ 280 register unsigned long arg0 asm("r0") = (u32)a0 281 282 #define __declare_arg_1(a0, a1, res) \ 283 typeof(a1) __a1 = a1; \ 284 struct arm_smccc_res *___res = res; \ 285 register unsigned long arg0 asm("r0") = (u32)a0; \ 286 register typeof(a1) arg1 asm("r1") = __a1 287 288 #define __declare_arg_2(a0, a1, a2, res) \ 289 typeof(a1) __a1 = a1; \ 290 typeof(a2) __a2 = a2; \ 291 struct arm_smccc_res *___res = res; \ 292 register unsigned long arg0 asm("r0") = (u32)a0; \ 293 register typeof(a1) arg1 asm("r1") = __a1; \ 294 register typeof(a2) arg2 asm("r2") = __a2 295 296 #define __declare_arg_3(a0, a1, a2, a3, res) \ 297 typeof(a1) __a1 = a1; \ 298 typeof(a2) __a2 = a2; \ 299 typeof(a3) __a3 = a3; \ 300 struct arm_smccc_res *___res = res; \ 301 register unsigned long arg0 asm("r0") = (u32)a0; \ 302 register typeof(a1) arg1 asm("r1") = __a1; \ 303 register typeof(a2) arg2 asm("r2") = __a2; \ 304 register typeof(a3) arg3 asm("r3") = __a3 305 306 #define __declare_arg_4(a0, a1, a2, a3, a4, res) \ 307 typeof(a4) __a4 = a4; \ 308 __declare_arg_3(a0, a1, a2, a3, res); \ 309 register typeof(a4) arg4 asm("r4") = __a4 310 311 #define __declare_arg_5(a0, a1, a2, a3, a4, a5, res) \ 312 typeof(a5) __a5 = a5; \ 313 __declare_arg_4(a0, a1, a2, a3, a4, res); \ 314 register typeof(a5) arg5 asm("r5") = __a5 315 316 #define __declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res) \ 317 typeof(a6) __a6 = a6; \ 318 __declare_arg_5(a0, a1, a2, a3, a4, a5, res); \ 319 register typeof(a6) arg6 asm("r6") = __a6 320 321 #define __declare_arg_7(a0, a1, a2, a3, a4, a5, a6, a7, res) \ 322 typeof(a7) __a7 = a7; \ 323 __declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res); \ 324 register typeof(a7) arg7 asm("r7") = __a7 325 326 #define ___declare_args(count, ...) __declare_arg_ ## count(__VA_ARGS__) 327 #define __declare_args(count, ...) ___declare_args(count, __VA_ARGS__) 328 329 #define ___constraints(count) \ 330 : __constraint_read_ ## count \ 331 : "memory" 332 #define __constraints(count) ___constraints(count) 333 334 /* 335 * We have an output list that is not necessarily used, and GCC feels 336 * entitled to optimise the whole sequence away. "volatile" is what 337 * makes it stick. 338 */ 339 #define __arm_smccc_1_1(inst, ...) \ 340 do { \ 341 register unsigned long r0 asm("r0"); \ 342 register unsigned long r1 asm("r1"); \ 343 register unsigned long r2 asm("r2"); \ 344 register unsigned long r3 asm("r3"); \ 345 __declare_args(__count_args(__VA_ARGS__), __VA_ARGS__); \ 346 asm volatile(inst "\n" : \ 347 "=r" (r0), "=r" (r1), "=r" (r2), "=r" (r3) \ 348 __constraints(__count_args(__VA_ARGS__))); \ 349 if (___res) \ 350 *___res = (typeof(*___res)){r0, r1, r2, r3}; \ 351 } while (0) 352 353 /* 354 * arm_smccc_1_1_smc() - make an SMCCC v1.1 compliant SMC call 355 * 356 * This is a variadic macro taking one to eight source arguments, and 357 * an optional return structure. 358 * 359 * @a0-a7: arguments passed in registers 0 to 7 360 * @res: result values from registers 0 to 3 361 * 362 * This macro is used to make SMC calls following SMC Calling Convention v1.1. 363 * The content of the supplied param are copied to registers 0 to 7 prior 364 * to the SMC instruction. The return values are updated with the content 365 * from register 0 to 3 on return from the SMC instruction if not NULL. 366 */ 367 #define arm_smccc_1_1_smc(...) __arm_smccc_1_1(SMCCC_SMC_INST, __VA_ARGS__) 368 369 /* 370 * arm_smccc_1_1_hvc() - make an SMCCC v1.1 compliant HVC call 371 * 372 * This is a variadic macro taking one to eight source arguments, and 373 * an optional return structure. 374 * 375 * @a0-a7: arguments passed in registers 0 to 7 376 * @res: result values from registers 0 to 3 377 * 378 * This macro is used to make HVC calls following SMC Calling Convention v1.1. 379 * The content of the supplied param are copied to registers 0 to 7 prior 380 * to the HVC instruction. The return values are updated with the content 381 * from register 0 to 3 on return from the HVC instruction if not NULL. 382 */ 383 #define arm_smccc_1_1_hvc(...) __arm_smccc_1_1(SMCCC_HVC_INST, __VA_ARGS__) 384 385 /* 386 * Like arm_smccc_1_1* but always returns SMCCC_RET_NOT_SUPPORTED. 387 * Used when the SMCCC conduit is not defined. The empty asm statement 388 * avoids compiler warnings about unused variables. 389 */ 390 #define __fail_smccc_1_1(...) \ 391 do { \ 392 __declare_args(__count_args(__VA_ARGS__), __VA_ARGS__); \ 393 asm ("" : __constraints(__count_args(__VA_ARGS__))); \ 394 if (___res) \ 395 ___res->a0 = SMCCC_RET_NOT_SUPPORTED; \ 396 } while (0) 397 398 /* 399 * arm_smccc_1_1_invoke() - make an SMCCC v1.1 compliant call 400 * 401 * This is a variadic macro taking one to eight source arguments, and 402 * an optional return structure. 403 * 404 * @a0-a7: arguments passed in registers 0 to 7 405 * @res: result values from registers 0 to 3 406 * 407 * This macro will make either an HVC call or an SMC call depending on the 408 * current SMCCC conduit. If no valid conduit is available then -1 409 * (SMCCC_RET_NOT_SUPPORTED) is returned in @res.a0 (if supplied). 410 * 411 * The return value also provides the conduit that was used. 412 */ 413 #define arm_smccc_1_1_invoke(...) ({ \ 414 int method = arm_smccc_1_1_get_conduit(); \ 415 switch (method) { \ 416 case SMCCC_CONDUIT_HVC: \ 417 arm_smccc_1_1_hvc(__VA_ARGS__); \ 418 break; \ 419 case SMCCC_CONDUIT_SMC: \ 420 arm_smccc_1_1_smc(__VA_ARGS__); \ 421 break; \ 422 default: \ 423 __fail_smccc_1_1(__VA_ARGS__); \ 424 method = SMCCC_CONDUIT_NONE; \ 425 break; \ 426 } \ 427 method; \ 428 }) 429 430 #endif /*__ASSEMBLY__*/ 431 #endif /*__LINUX_ARM_SMCCC_H*/ 432