/arch/c6x/lib/ |
D | csum_64plus.S | 91 SHL .S1 A7,8,A0 94 || ADD .S1 A0,A9,A9 103 SHL .S1 A8,8,A0 106 || ADD .S1 A0,A9,A9 143 SHRU .S1 A9,16,A0 144 [A0] BNOP .S1 L91,5 204 L12: SHRU .S1 A5,16,A0 205 [!A0] BNOP .S1 L14,5 210 SHRU .S1 A5,16,A0 211 [A0] BNOP .S1 L13,5 [all …]
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D | llshru.S | 14 mvk .s1 32,A0 15 sub .d1 A0,A1,A0 16 cmplt .l1 0,A0,A2 17 [A2] shl .s1 A5,A0,A0 19 [!A2] neg .l1 A0,A4 22 || [A2] or .d1 A4,A0,A4
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D | llshl.S | 14 mvk .s1 32,A0 15 sub .d1 A0,A1,A0 16 cmplt .l1 0,A0,A2 17 [A2] shru .s1 A4,A0,A0 18 [!A2] neg .l1 A0,A5 21 || [A2] or .d1 A5,A0,A5
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D | llshr.S | 14 mvk .s1 32,A0 15 sub .d1 A0,A1,A0 16 cmplt .l1 0,A0,A2 17 [A2] shl .s1 A5,A0,A0 19 [!A2] neg .l1 A0,A4 22 || [A2] or .d1 A4,A0,A4
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D | negll.S | 13 mvk .l1 0,A0 14 subu .l1 A0,A4,A3:A2 15 sub .l1 A0,A5,A0 17 add .l1 A5,A0,A5
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D | memcpy_64plus.S | 13 AND .L1 0x1,A6,A0 19 [A0] LDB .D2T1 *B4++,A5 26 [A0] STB .D1T1 A5,*A3++
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D | strasgi.S | 13 ldw .d2t1 *B4++, A0 23 || mv .s2x A0, B5 28 || [B0] ldw .d2t1 *B4++, A0 58 || mv .s2x A0, B5
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D | divi.S | 10 ;; __c6xabi_divi A0,A1,A2,A4,A6,B0,B1,B2,B4,B5 11 ;; __c6xabi_divu A0,A1,A2,A4,A6,B0,B1,B2,B4 17 ;; A0 is not clobbered by any of the functions.
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D | remi.S | 10 ;; __c6xabi_divi A0,A1,A2,A4,A6,B0,B1,B2,B4,B5 11 ;; __c6xabi_divu A0,A1,A2,A4,A6,B0,B1,B2,B4 17 ;; A0 is not clobbered by any of the functions.
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D | mpyll.S | 28 mpy32u .m1x A4,B4,A1:A0 ; X0*Y0 34 mv .s1 A0,A4
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D | remu.S | 10 ;; __c6xabi_divi A0,A1,A2,A4,A6,B0,B1,B2,B4,B5 11 ;; __c6xabi_divu A0,A1,A2,A4,A6,B0,B1,B2,B4 17 ;; A0 is not clobbered by any of the functions.
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D | divu.S | 10 ;; __c6xabi_divi A0,A1,A2,A4,A6,B0,B1,B2,B4,B5 11 ;; __c6xabi_divu A0,A1,A2,A4,A6,B0,B1,B2,B4 17 ;; A0 is not clobbered by any of the functions.
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/arch/c6x/kernel/ |
D | head.S | 56 MVKL .S1 OF_DT_HEADER,A0 57 MVKH .S1 OF_DT_HEADER,A0 58 CMPEQ .L1 A10,A0,A0 59 [A0] MV .S1X B10,A4 60 [!A0] MVK .S1 0,A4 63 MVKL .S1 machine_init,A0 64 MVKH .S1 machine_init,A0 65 B .S2X A0 74 MVKL .S1 start_kernel,A0 75 MVKH .S1 start_kernel,A0 [all …]
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D | vectors.S | 21 STW .D2T1 A0,*B15--[2] 22 || MVKL .S1 \handler,A0 23 MVKH .S1 \handler,A0 24 B .S2X A0 25 LDW .D2T1 *++B15[2],A0 48 MVKL .S1 _c_int00,A0 ; branch to _c_int00 49 MVKH .S1 _c_int00,A0 50 B .S2X A0
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D | entry.S | 91 || STDW .D1T1 A1:A0,*A15--[1] 148 LDDW .D1T1 *++A15[1],A1:A0 192 MVKL .S1 schedule,A0 193 MVKH .S1 schedule,A0 194 B .S2X A0 205 MVKL .S1 syscall_trace_entry,A0 206 MVKH .S1 syscall_trace_entry,A0 207 B .S2X A0 241 AND .D1 _TIF_SYSCALL_TRACE,A2,A0 242 [!A0] BNOP .S1 work_pending,5 [all …]
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D | switch_to.S | 50 || LDDW .D1T1 *+A5(THREAD_RICL_ICL),A1:A0 64 MV .L2X A0,B0
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/arch/mips/mm/ |
D | page.c | 41 #define A0 4 macro 235 uasm_i_sd(buf, ZERO, off, A0); in build_clear_store() 237 uasm_i_sw(buf, ZERO, off, A0); in build_clear_store() 248 A0); in build_clear_pref() 251 uasm_i_cache(buf, Create_Dirty_Excl_SD, off, A0); in build_clear_pref() 265 uasm_i_cache(buf, Create_Dirty_Excl_D, off, A0); in build_clear_pref() 303 pg_addiu(&buf, A2, A0, off); in build_clear_page() 305 uasm_i_ori(&buf, A2, A0, off); in build_clear_page() 322 pg_addiu(&buf, A0, A0, 2 * off); in build_clear_page() 327 uasm_il_bne(&buf, &r, A0, A2, label_clear_pref); in build_clear_page() [all …]
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/arch/arm/boot/dts/ |
D | kirkwood-rd88f6281-a.dts | 7 * This file contains the definitions for the board with the A0 or 16 model = "Marvell RD88f6281 Reference design, with A0 or higher SoC";
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D | aspeed-ast2600-evb.dts | 152 // Workaround for A0
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D | aspeed-bmc-opp-tacoma.dts | 105 /*A0-A7*/ "","","","","","","","", 823 // Workaround for A0 828 // Workaround for A0
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/arch/mips/kvm/ |
D | entry.c | 27 #define A0 4 macro 240 UASM_i_MTC0(&p, A0, scratch_vcpu[0], scratch_vcpu[1]); in kvm_mips_build_vcpu_run() 243 UASM_i_ADDIU(&p, K1, A0, offsetof(struct kvm_vcpu, arch)); in kvm_mips_build_vcpu_run() 326 UASM_i_LW(&p, A0, offsetof(struct kvm, arch.gpa_mm.pgd), S0); in kvm_mips_build_enter_guest() 331 UASM_i_MTC0(&p, A0, C0_PWBASE); in kvm_mips_build_enter_guest() 416 UASM_i_LW(&p, A0, (int)offsetof(struct mm_struct, pgd) - in kvm_mips_build_enter_guest() 737 UASM_i_LW(&p, A0, in kvm_mips_build_exit() 743 UASM_i_MTC0(&p, A0, C0_PWBASE); in kvm_mips_build_exit() 808 uasm_i_move(&p, A0, S0); in kvm_mips_build_exit()
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/arch/h8300/lib/ |
D | libgcc.h | 6 #define A0 r0
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D | moddivsi3.S | 4 ; numerator in A0/A1
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D | modsi3.S | 4 ; numerator in A0/A1
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/arch/mips/boot/dts/pic32/ |
D | pic32mzda_sk.dts | 102 pins = "A6", "D4", "G13", "G12", "G14", "A7", "A0";
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