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Searched refs:ARMV8_PMU_USERENR_SW (Results 1 – 2 of 2) sorted by relevance

/arch/arm64/include/asm/
Dperf_event.h235 #define ARMV8_PMU_USERENR_SW (1 << 1) /* PMSWINC can be written at EL0 */ macro
/arch/arm64/kvm/
Dsys_regs.c644 return check_pmu_access_disabled(vcpu, ARMV8_PMU_USERENR_SW | ARMV8_PMU_USERENR_EN); in pmu_write_swinc_el0_disabled()