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Searched refs:CLASS0_ENABLE_SPU_ERROR_INTR (Results 1 – 2 of 2) sorted by relevance

/arch/powerpc/include/asm/
Dspu.h503 #define CLASS0_ENABLE_SPU_ERROR_INTR 0x4L macro
/arch/powerpc/platforms/cell/spufs/
Dswitch.c2157 CLASS0_ENABLE_SPU_ERROR_INTR; in init_priv1()