Home
last modified time | relevance | path

Searched refs:CLASS2_MAILBOX_INTR (Results 1 – 4 of 4) sorted by relevance

/arch/powerpc/platforms/cell/
Dspu_base.c351 CLASS2_MAILBOX_THRESHOLD_INTR | CLASS2_MAILBOX_INTR; in spu_irq_class_2()
368 if (stat & CLASS2_MAILBOX_INTR) in spu_irq_class_2()
/arch/powerpc/platforms/cell/spufs/
Dhw_ops.c64 spu_int_stat_clear(spu, 2, CLASS2_MAILBOX_INTR); in spu_hw_mbox_stat_poll()
Dbacking_ops.c96 ~CLASS2_MAILBOX_INTR; in spu_backing_mbox_stat_poll()
/arch/powerpc/include/asm/
Dspu.h525 #define CLASS2_MAILBOX_INTR 0x1L macro