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Searched refs:CPHYSADDR (Results 1 – 23 of 23) sorted by relevance

/arch/mips/include/asm/
Daddrspace.h53 #define CPHYSADDR(a) ((_ACAST32_(a)) & 0x1fffffff) macro
73 #define CKSEG0ADDR(a) (CPHYSADDR(a) | CKSEG0)
74 #define CKSEG1ADDR(a) (CPHYSADDR(a) | CKSEG1)
75 #define CKSEG2ADDR(a) (CPHYSADDR(a) | CKSEG2)
76 #define CKSEG3ADDR(a) (CPHYSADDR(a) | CKSEG3)
80 #define CKSEG0ADDR(a) (CPHYSADDR(a) | KSEG0)
81 #define CKSEG1ADDR(a) (CPHYSADDR(a) | KSEG1)
82 #define CKSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
83 #define CKSEG3ADDR(a) (CPHYSADDR(a) | KSEG3)
88 #define KSEG0ADDR(a) (CPHYSADDR(a) | KSEG0)
[all …]
Dpage.h179 return x < CKSEG0 ? XPHYSADDR(x) : CPHYSADDR(x); in ___pa()
189 return CPHYSADDR(x); in ___pa()
/arch/mips/include/asm/mach-jazz/
Dfloppy.h67 vdma_set_addr(JAZZ_FLOPPY_DMA, vdma_phys2log(CPHYSADDR((unsigned long)a))); in fd_set_dma_addr()
111 vdma_alloc(CPHYSADDR(mem), size); /* XXX error checking */ in fd_dma_mem_alloc()
118 vdma_free(vdma_phys2log(CPHYSADDR(addr))); in fd_dma_mem_free()
/arch/mips/netlogic/xlr/
Dplatform.c93 xlr_uart_data[0].mapbase = CPHYSADDR(uartbase); in nlm_uart_init()
97 xlr_uart_data[1].mapbase = CPHYSADDR(uartbase); in nlm_uart_init()
180 memres = CPHYSADDR((unsigned long)usb_mmio); in xls_platform_usb_init()
237 nlm_xlr_i2c_1.resource[0].start = CPHYSADDR(nlm_mmio_base(offset)); in nlm_i2c_init()
/arch/mips/include/asm/mach-dec/
Dmc146818rtc.h20 #define RTC_PORT(x) CPHYSADDR((long)dec_rtc_base)
/arch/mips/alchemy/devboards/
Dbcsr.c33 bcsr1_phys = KSEG1ADDR(CPHYSADDR(bcsr1_phys)); in bcsr_init()
34 bcsr2_phys = KSEG1ADDR(CPHYSADDR(bcsr2_phys)); in bcsr_init()
/arch/mips/ar7/
Dmemory.c24 u32 *kernel_end = (u32 *)KSEG1ADDR(CPHYSADDR((u32)&_end)); in memsize()
/arch/mips/ralink/
Dprom.c53 if (CPHYSADDR(p) && *p) { in prom_init_cmdline()
/arch/mips/lantiq/xway/
Dvmmc.c32 (void *) CPHYSADDR(dma_alloc_coherent(&pdev->dev, CP1_SIZE, in vmmc_probe()
/arch/mips/dec/
Dtc.c45 tbus->slot_base = CPHYSADDR((long)rex_slot_address(0)); in tc_bus_get_info()
Dkn01-berr.c106 address = CPHYSADDR(vaddr); in dec_kn01_be_backend()
/arch/mips/sibyte/common/
Dcfe.c95 initrd_pstart = CPHYSADDR(initrd_start); in prom_meminit()
96 initrd_pend = CPHYSADDR(initrd_end); in prom_meminit()
/arch/mips/lantiq/
Dprom.c56 if (CPHYSADDR(p) && *p) { in prom_init_cmdline()
/arch/mips/bcm47xx/
Dprom.c77 off = CPHYSADDR((unsigned long)prom_init); in prom_init_mem()
/arch/mips/txx9/rbtx4938/
Dsetup.c213 rbtx4938_fpga_resource.start = CPHYSADDR(RBTX4938_FPGA_REG_ADDR); in rbtx4938_mem_setup()
214 rbtx4938_fpga_resource.end = CPHYSADDR(RBTX4938_FPGA_REG_ADDR) + 0xffff; in rbtx4938_mem_setup()
/arch/mips/include/asm/mach-au1x00/
Dau1000_dma.h242 __raw_writel(CPHYSADDR(chan->fifo_addr), chan->io + DMA_PERIPHERAL_ADDR); in init_dma()
307 __raw_writel(CPHYSADDR(a), chan->io + DMA_PERIPHERAL_ADDR); in set_dma_fifo_addr()
/arch/mips/alchemy/common/
Dplatform.c37 alchemy_uart_enable(CPHYSADDR(port->membase)); in alchemy_8250_pm()
42 alchemy_uart_disable(CPHYSADDR(port->membase)); in alchemy_8250_pm()
Dclock.c109 #define IOMEM(x) ((void __iomem *)(KSEG1ADDR(CPHYSADDR(x))))
/arch/mips/mm/
Dpage.c631 u64 to_phys = CPHYSADDR((unsigned long)page); in clear_page()
656 u64 from_phys = CPHYSADDR((unsigned long)from); in copy_page()
657 u64 to_phys = CPHYSADDR((unsigned long)to); in copy_page()
/arch/mips/pci/
Dpci-malta.c100 GT_WRITE(GT_PCI0_CFGDATA_OFS, CPHYSADDR(MIPS_GT_BASE)); in mips_pcibios_init()
/arch/mips/sgi-ip22/
Dip28-berr.c414 CPHYSADDR(hp->addr), hp->ctrl, hp->ndptr, hp->cbp); in ip28_be_interrupt()
/arch/mips/jazz/
Djazzdma.c83 CPHYSADDR((unsigned long)pgtbl)); in vdma_init()
/arch/mips/kvm/
Dtrap_emul.c30 gpa = CPHYSADDR(gva); in kvm_trap_emul_gva_to_gpa_cb()