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Searched refs:CPUCFG_CX_CTRL_REG0_L1_RST_DISABLE (Results 1 – 1 of 1) sorted by relevance

/arch/arm/mach-sunxi/
Dmc_smp.c39 #define CPUCFG_CX_CTRL_REG0_L1_RST_DISABLE(n) BIT(n) macro
189 reg &= ~CPUCFG_CX_CTRL_REG0_L1_RST_DISABLE(cpu); in sunxi_cpu_powerup()