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Searched refs:DEC_IRQ_CASCADE (Results 1 – 2 of 2) sorted by relevance

/arch/mips/dec/
Dsetup.c163 [DEC_IRQ_CASCADE] = -1,
240 [DEC_IRQ_CASCADE] = -1,
315 [DEC_IRQ_CASCADE] = DEC_CPU_IRQ_NR(KN02_CPU_INR_CASCADE),
412 [DEC_IRQ_CASCADE] = DEC_CPU_IRQ_NR(KN02BA_CPU_INR_CASCADE),
513 [DEC_IRQ_CASCADE] = DEC_CPU_IRQ_NR(KN02CA_CPU_INR_CASCADE),
610 [DEC_IRQ_CASCADE] = DEC_CPU_IRQ_NR(KN03_CPU_INR_CASCADE),
761 if (dec_interrupt[DEC_IRQ_CASCADE] >= 0) { in arch_init_irq()
762 if (request_irq(dec_interrupt[DEC_IRQ_CASCADE], no_action, in arch_init_irq()
/arch/mips/include/asm/dec/
Dinterrupts.h25 #define DEC_IRQ_CASCADE 0 /* cascade from CSR or I/O ASIC */ macro