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Searched refs:FPU_CSR_COND5_S (Results 1 – 1 of 1) sorted by relevance

/arch/mips/include/asm/
Dmipsregs.h1161 #define FPU_CSR_COND5_S 29 /* $fcc5 */ macro
1162 #define FPU_CSR_COND5 (_ULCAST_(1) << FPU_CSR_COND5_S)