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Searched refs:MDCNFG (Results 1 – 4 of 4) sorted by relevance

/arch/arm/mach-sa1100/
Dsleep.S102 ldr r9, =MDCNFG
130 @ Step 4 clear DE bis in MDCNFG
/arch/arm/mach-pxa/include/mach/
Dsmemc.h15 #define MDCNFG (SMEMC_VIRT + 0x00) /* SDRAM Configuration Register 0 */ macro
/arch/arm/common/
Dsa1111.c891 FExtr(MDCNFG, MDCNFG_SA1110_DRAC0), in __sa1111_probe()
892 FExtr(MDCNFG, MDCNFG_SA1110_TDL0)); in __sa1111_probe()
/arch/arm/mach-sa1100/include/mach/
DSA-1100.h1368 #define MDCNFG __REG(0xA0000000) /* DRAM CoNFiGuration reg. */ macro