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Searched refs:MIDR_REVISION_MASK (Results 1 – 3 of 3) sorted by relevance

/arch/arm64/include/asm/
Dcputype.h24 #define MIDR_REVISION_MASK 0xf macro
25 #define MIDR_REVISION(midr) ((midr) & MIDR_REVISION_MASK)
202 u32 rv = midr & (MIDR_REVISION_MASK | MIDR_VARIANT_MASK); in midr_is_cpu_model_range()
/arch/arm64/kernel/
Dcpu_errata.c27 midr &= MIDR_REVISION_MASK | MIDR_VARIANT_MASK; in is_affected_midr_range()
Dcpufeature.c1379 MIDR_CPU_VAR_REV(1, MIDR_REVISION_MASK)); in has_no_hw_prefetch()