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Searched refs:MIDR_VARIANT_MASK (Results 1 – 2 of 2) sorted by relevance

/arch/arm64/include/asm/
Dcputype.h35 #define MIDR_VARIANT_MASK (0xf << MIDR_VARIANT_SHIFT) macro
37 (((midr) & MIDR_VARIANT_MASK) >> MIDR_VARIANT_SHIFT)
202 u32 rv = midr & (MIDR_REVISION_MASK | MIDR_VARIANT_MASK); in midr_is_cpu_model_range()
/arch/arm64/kernel/
Dcpu_errata.c27 midr &= MIDR_REVISION_MASK | MIDR_VARIANT_MASK; in is_affected_midr_range()