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Searched refs:MSR_IDT_MCR0 (Results 1 – 2 of 2) sorted by relevance

/arch/x86/kernel/cpu/mtrr/
Dcentaur.c96 wrmsr(MSR_IDT_MCR0 + reg, low, high); in centaur_set_mcr()
/arch/x86/include/asm/
Dmsr-index.h644 #define MSR_IDT_MCR0 0x00000110 macro