Searched refs:MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 (Results 1 – 5 of 5) sorted by relevance
23 MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x0b0b0
123 MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x1b0b0
285 MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x1b0b0 /* DOUT1 */
21 #define MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x0030 0x02bc 0x0000 5 0 macro
744 MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x0b0b0 /* ETN PHY INT */