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Searched refs:NR_IRQS (Results 1 – 25 of 76) sorted by relevance

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/arch/alpha/include/asm/
Dirq.h29 # define NR_IRQS (128) /* max is RAWHIDE/TAKARA */ macro
31 # define NR_IRQS (32768 + 16) /* marvel - 32 pids */ macro
39 # define NR_IRQS 35 macro
44 # define NR_IRQS 32 macro
51 # define NR_IRQS 48 macro
55 # define NR_IRQS 40 macro
60 # define NR_IRQS 64 macro
63 #define NR_IRQS 80 macro
68 # define NR_IRQS 128 macro
71 # define NR_IRQS 2048 /* enuff for 8 QBBs */ macro
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/arch/m68k/include/asm/
Dirq.h14 #define NR_IRQS 256 macro
16 #define NR_IRQS 200 macro
18 #define NR_IRQS 141 macro
20 #define NR_IRQS 72 macro
22 #define NR_IRQS 43 macro
24 #define NR_IRQS 32 macro
26 #define NR_IRQS 24 macro
28 #define NR_IRQS 8 macro
30 #define NR_IRQS 0 macro
/arch/mips/include/asm/mach-db1x00/
Dirq.h12 #ifdef NR_IRQS
13 #undef NR_IRQS
21 #define NR_IRQS 152 macro
/arch/arm/mach-spear/include/mach/
Dirqs.h17 #define NR_IRQS 256 macro
27 #define NR_IRQS (IRQ_VIC_END + VIRTUAL_IRQS) macro
32 #define NR_IRQS IRQ_GIC_END macro
/arch/x86/include/asm/
Dirq_vectors.h134 #define NR_IRQS \ macro
139 #define NR_IRQS (NR_VECTORS + IO_APIC_VECTOR_LIMIT) macro
141 #define NR_IRQS (NR_VECTORS + CPU_VECTOR_LIMIT) macro
143 #define NR_IRQS NR_IRQS_LEGACY macro
/arch/ia64/kernel/
Dirq.c55 static char irq_redir [NR_IRQS]; // = { [0 ... NR_IRQS-1] = 1 };
59 if (irq < NR_IRQS) { in set_irq_affinity_info()
74 unsigned int vectors_in_migration[NR_IRQS];
84 for (irq=0; irq < NR_IRQS; irq++) { in migrate_irqs()
162 for (irq=0; irq < NR_IRQS; irq++) { in fixup_irqs()
Dirq_ia64.c72 struct irq_cfg irq_cfg[NR_IRQS] __read_mostly = {
73 [0 ... NR_IRQS - 1] = {
87 static int irq_status[NR_IRQS] = {
88 [0 ... NR_IRQS -1] = IRQ_UNUSED
95 for (irq = IA64_FIRST_DEVICE_VECTOR; irq < NR_IRQS; irq++) in find_unassigned_irq()
126 BUG_ON((unsigned)irq >= NR_IRQS); in __bind_irq_vector()
162 BUG_ON((unsigned)irq >= NR_IRQS); in __clear_irq_vector()
239 for (irq = 0; irq < NR_IRQS; ++irq) { in __setup_vector_irq()
516 extern unsigned int vectors_in_migration[NR_IRQS]; in ia64_process_pending_intr()
/arch/sparc/kernel/
Dirq_32.c113 static struct irq_bucket irq_table[NR_IRQS];
129 for (i = 1; i < NR_IRQS; i++) { in irq_alloc()
134 for (i = 1; i < NR_IRQS; i++) { in irq_alloc()
139 if (i < NR_IRQS) { in irq_alloc()
163 BUG_ON(irq >= NR_IRQS); in irq_link()
181 BUG_ON(irq >= NR_IRQS); in irq_unlink()
254 cpu_irq = (irq & (NR_IRQS - 1)); in sparc_floppy_request_irq()
/arch/mips/include/asm/mach-generic/
Dirq.h11 #ifndef NR_IRQS
12 #define NR_IRQS 256 macro
/arch/h8300/include/asm/
Dirq.h8 #define NR_IRQS 64 macro
13 #define NR_IRQS 128 macro
/arch/sh/include/asm/
Dirq.h14 # define NR_IRQS 8 macro
16 # define NR_IRQS 512 macro
/arch/mips/vr41xx/common/
Dirq.c18 static irq_cascade_t irq_cascade[NR_IRQS] __cacheline_aligned;
24 if (irq >= NR_IRQS) in cascade_irq()
48 if (irq >= NR_IRQS) { in irq_dispatch()
/arch/arm/mach-sa1100/include/mach/
Dirqs.h98 #ifndef NR_IRQS
99 #define NR_IRQS (IRQ_BOARD_START + NR_IRQS_LOCOMO) macro
/arch/mips/txx9/jmr3927/
Dirq.c42 #if JMR3927_IRQ_END > NR_IRQS
43 #error JMR3927_IRQ_END > NR_IRQS
/arch/mips/include/asm/mach-malta/
Dirq.h6 #define NR_IRQS 256 macro
/arch/mips/include/asm/mach-ar7/
Dirq.h12 #define NR_IRQS 256 macro
/arch/mips/include/asm/mach-pistachio/
Dirq.h11 #define NR_IRQS 256 macro
/arch/mips/include/asm/mach-lantiq/xway/
Dirq.h12 #define NR_IRQS 256 macro
/arch/arm/mach-iop32x/include/mach/
Dirqs.h12 #define NR_IRQS 33 macro
/arch/mips/include/asm/mach-lantiq/falcon/
Dirq.h12 #define NR_IRQS 328 macro
/arch/mips/include/asm/mach-pic32/
Dirq.h9 #define NR_IRQS 256 macro
/arch/mips/include/asm/mach-bcm63xx/
Dirq.h5 #define NR_IRQS 128 macro
/arch/mips/include/asm/mach-ralink/
Dirq.h6 #define NR_IRQS 256 macro
/arch/hexagon/include/asm/
Dirq.h19 #define NR_IRQS 512 macro
/arch/openrisc/include/asm/
Dirq.h18 #define NR_IRQS 32 macro

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