Searched refs:REG2 (Results 1 – 11 of 11) sorted by relevance
/arch/sparc/include/asm/ |
D | tsb.h | 99 #define TSB_CAS_TAG_HIGH(TSB, REG1, REG2) \ argument 100 661: casa [TSB] ASI_N, REG1, REG2; \ 103 casa [TSB] ASI_PHYS_USE_EC, REG1, REG2; \ 106 #define TSB_CAS_TAG(TSB, REG1, REG2) \ argument 107 661: casxa [TSB] ASI_N, REG1, REG2; \ 110 casxa [TSB] ASI_PHYS_USE_EC, REG1, REG2; \ 120 #define TSB_LOCK_TAG(TSB, REG1, REG2) \ argument 122 sethi %hi(TSB_TAG_LOCK_HIGH), REG2;\ 123 andcc REG1, REG2, %g0; \ 126 TSB_CAS_TAG_HIGH(TSB, REG1, REG2); \ [all …]
|
D | trap_block.h | 184 #define LOAD_PER_CPU_BASE(DEST, THR, REG1, REG2, REG3) \ argument 186 sethi %hi(trap_block), REG2; \ 188 or REG2, %lo(trap_block), REG2; \ 189 add REG2, REG1, REG2; \ 190 ldx [REG2 + TRAP_PER_CPU_PER_CPU_BASE], DEST; 213 #define LOAD_PER_CPU_BASE(DEST, THR, REG1, REG2, REG3) argument
|
/arch/arm64/boot/dts/rockchip/ |
D | rk3368-evb-act8846.dts | 61 vcc_io: REG2 {
|
/arch/arm/boot/dts/ |
D | rk3288-evb-act8846.dts | 92 vcc_io: REG2 {
|
D | rk3288-firefly-reload-core.dtsi | 119 vcc_io: REG2 {
|
D | rk3288-rock2-som.dtsi | 105 vcc_io: vccio_codec: REG2 {
|
D | rk3188-radxarock.dts | 200 vdd_log: REG2 {
|
D | rk3288-r89.dts | 186 vcc_io: REG2 {
|
D | rk3288-miqi.dts | 189 vcc_io: REG2 {
|
D | rk3288-firefly.dtsi | 271 vcc_io: REG2 {
|
D | rk3188-bqedison2qc.dts | 318 vdd_log: REG2 {
|