Ser1SDCR0 (reference) in projects: arch

70 	SAVE(Ser1SDCR0);  in sa11x0_pm_enter()
104 	RESTORE(Ser1SDCR0);  in sa11x0_pm_enter()

85 	Ser1SDCR0 |= SDCR0_SUS;  in hackkit_map_io()

309 		Ser1SDCR0 |= SDCR0_UART;  in badge4_uart_pm()

429 #define Ser1SDCR0	__REG(0x80020060)  /* Ser. port 1 SDLC Control Reg. 0 */  macro

/arch/arm/mach-sa1100/
D	pm.c	`70 SAVE(Ser1SDCR0); in sa11x0_pm_enter() 104 RESTORE(Ser1SDCR0); in sa11x0_pm_enter()`
D	nanoengine.c	`93 Ser1SDCR0 \|= SDCR0_UART; in nanoengine_map_io()`
D	hackkit.c	`85 Ser1SDCR0 \|= SDCR0_SUS; in hackkit_map_io()`
D	shannon.c	`137 Ser1SDCR0 \|= SDCR0_SUS; in shannon_map_io()`
D	badge4.c	`309 Ser1SDCR0 \|= SDCR0_UART; in badge4_uart_pm()`
D	assabet.c	`716 Ser1SDCR0 \|= SDCR0_SUS; in assabet_map_io()`
/arch/arm/mach-sa1100/include/mach/
D	SA-1100.h	`429 #define Ser1SDCR0 __REG(0x80020060) /* Ser. port 1 SDLC Control Reg. 0 */ macro`