| /arch/x86/crypto/ |
| D | ghash-clmulni-intel_asm.S | 28 #define T3 %xmm4 macro
49 pshufd $0b01001110, SHASH, T3
51 pxor SHASH, T3
55 pclmulqdq $0x00, T3, T2 # T2 = (a1 + a0) * (b1 + b0)
59 movaps T2, T3
60 pslldq $8, T3
62 pxor T3, DATA
67 movaps DATA, T3
68 psllq $1, T3
69 pxor DATA, T3
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| D | nh-avx2-x86_64.S | 28 #define T3 %ymm11 macro
42 vpaddd \k0, T3, T0
43 vpaddd \k1, T3, T1
44 vpaddd \k2, T3, T2
45 vpaddd \k3, T3, T3
54 vpshufd $0x10, T3, T7
55 vpshufd $0x32, T3, T3
59 vpmuludq T7, T3, T3
63 vpaddq T3, PASS3_SUMS, PASS3_SUMS
85 vmovdqu (MESSAGE), T3
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| D | aesni-intel_avx-x86_64.S | 605 .macro CALC_AAD_HASH GHASH_MUL AAD AADLEN T1 T2 T3 T4 T5 T6 T7 T8
621 \GHASH_MUL \T8, \T2, \T1, \T3, \T4, \T5, \T6
667 \GHASH_MUL \T7, \T2, \T1, \T3, \T4, \T5, \T6
895 .macro GHASH_MUL_AVX GH HK T1 T2 T3 T4 T5
898 vpshufd $0b01001110, \HK, \T3
900 vpxor \HK , \T3, \T3 # T3 = (b1+b0)
904 vpclmulqdq $0x00, \T3, \T2, \T2 # T2 = (a1+a0)*(b1+b0)
908 vpslldq $8, \T2,\T3 # shift-L T3 2 DWs
910 vpxor \T3, \GH, \GH
915 vpslld $30, \GH, \T3 # packed right shifting shift << 30
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| D | poly1305-x86_64-cryptogams.pl | 420 my ($H0,$H1,$H2,$H3,$H4, $T0,$T1,$T2,$T3,$T4, $D0,$D1,$D2,$D3,$D4, $MASK) =
892 vpsrldq \$6,$T1,$T3
895 vpunpcklqdq $T3,$T2,$T3 # 2:3
900 vpsrlq \$4,$T3,$T2
902 vpsrlq \$30,$T3,$T3
904 vpand $MASK,$T3,$T3 # 3
985 vpmuludq $T3,$D4,$D3 # d3 = h3*r0
991 vpmuludq $T3,$H2,$H1 # h3*r1
1013 vpmuludq $T3,$H4,$H4 # h3*s2
1024 vpmuludq $T3,$H3,$H1 # h3*s3
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| D | nh-sse2-x86_64.S | 23 #define T3 %xmm11 macro
43 movdqa T1, T3
47 paddd \k3, T3
56 pshufd $0x10, T3, T7
57 pshufd $0x32, T3, T3
61 pmuludq T7, T3
65 paddq T3, PASS3_SUMS
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| /arch/arm64/crypto/ |
| D | nh-neon-core.S | 28 T3 .req v11
37 ld1 {T3.16b}, [MESSAGE], #16
43 add T0.4s, T3.4s, \k0\().4s
44 add T1.4s, T3.4s, \k1\().4s
45 add T2.4s, T3.4s, \k2\().4s
46 add T3.4s, T3.4s, \k3\().4s
52 mov T7.d[0], T3.d[1]
56 umlal PASS3_SUMS.2d, T3.2s, T7.2s
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| D | sha512-armv8.pl | 463 my ($T0,$T1,$T2,$T3,$T4,$T5,$T6,$T7) = map("q$_",(4..7,16..19));
487 &ext_8 ($T3,@X[2],@X[3],4); # X[9..12]
497 &add_32 (@X[0],@X[0],$T3); # X[0..3] += X[9..12]
502 &ushr_32 ($T3,$T0,$sigma0[1]);
508 &sli_32 ($T3,$T0,32-$sigma0[1]);
514 &eor_8 ($T1,$T1,$T3); # sigma0(X[1..4])
523 &ushr_32 ($T3,$T7,$sigma1[1]);
529 &sli_u32 ($T3,$T7,32-$sigma1[1]);
536 &eor_8 ($T5,$T5,$T3); # sigma1(X[14..15])
661 ld1.32 {$T3},[$Ktbl], #16
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| /arch/arm/crypto/ |
| D | nh-neon-core.S | 45 T3 .req q11
52 vld1.8 {T3}, [MESSAGE]!
58 vadd.u32 T0, T3, \k0
59 vadd.u32 T1, T3, \k1
60 vadd.u32 T2, T3, \k2
61 vadd.u32 T3, T3, \k3
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| D | sha256-armv4.pl | 292 my ($T0,$T1,$T2,$T3,$T4,$T5)=("q8","q9","q10","q11","d24","d25");
332 &vshr_u32 ($T3,$T0,$sigma0[1]);
338 &vsli_32 ($T3,$T0,32-$sigma0[1]);
344 &veor ($T1,$T1,$T3); # sigma0(X[1..4])
487 vld1.32 {$T3},[$Ktbl,:128]!
502 vadd.i32 $T3,$T3,@X[3]
504 vst1.32 {$T3},[$Xfer,:128]!
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| D | ghash-ce-core.S | 84 T3 .req q8
211 1: vld1.8 {T3-T2}, [r2]!
221 vrev64.8 T3, T3
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| /arch/mips/mm/ |
| D | page.c | 47 #define T3 11 macro
484 build_copy_load(&buf, T3, off + 3 * copy_word_size); in build_copy_page()
492 build_copy_store(&buf, T3, off + 3 * copy_word_size); in build_copy_page()
506 build_copy_load(&buf, T3, off + 3 * copy_word_size); in build_copy_page()
516 build_copy_store(&buf, T3, off + 3 * copy_word_size); in build_copy_page()
529 build_copy_load(&buf, T3, off + 3 * copy_word_size); in build_copy_page()
537 build_copy_store(&buf, T3, off + 3 * copy_word_size); in build_copy_page()
547 build_copy_load(&buf, T3, off + 3 * copy_word_size); in build_copy_page()
558 build_copy_store(&buf, T3, off + 3 * copy_word_size); in build_copy_page()
571 build_copy_load(&buf, T3, off + 3 * copy_word_size); in build_copy_page()
[all …]
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| /arch/sparc/crypto/ |
| D | aes_asm.S | 13 #define ENCRYPT_TWO_ROUNDS_2(KEY_BASE, I0, I1, I2, I3, T0, T1, T2, T3) \ argument
17 AES_EROUND23(KEY_BASE + 2, I2, I3, T3) \
20 AES_EROUND01(KEY_BASE + 4, T2, T3, I2) \
21 AES_EROUND23(KEY_BASE + 6, T2, T3, I3)
29 #define ENCRYPT_TWO_ROUNDS_LAST_2(KEY_BASE, I0, I1, I2, I3, T0, T1, T2, T3) \ argument
33 AES_EROUND23(KEY_BASE + 2, I2, I3, T3) \
36 AES_EROUND01_L(KEY_BASE + 4, T2, T3, I2) \
37 AES_EROUND23_L(KEY_BASE + 6, T2, T3, I3)
47 #define ENCRYPT_128_2(KEY_BASE, I0, I1, I2, I3, T0, T1, T2, T3) \ argument
48 ENCRYPT_TWO_ROUNDS_2(KEY_BASE + 0, I0, I1, I2, I3, T0, T1, T2, T3) \
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| /arch/mips/kvm/ |
| D | entry.c | 34 #define T3 11 macro
41 #define T3 15 macro
391 UASM_i_ADDU(&p, T3, T1, T2); in kvm_mips_build_enter_guest()
392 UASM_i_LW(&p, K0, 0, T3); in kvm_mips_build_enter_guest()
398 uasm_i_addiu(&p, T3, ZERO, sizeof(struct cpuinfo_mips)/sizeof(long)); in kvm_mips_build_enter_guest()
399 uasm_i_mul(&p, T2, T2, T3); in kvm_mips_build_enter_guest()
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| /arch/arm64/boot/dts/ti/ |
| D | k3-j7200-common-proc-board.dts | 56 J721E_IOPAD(0xe0, PIN_INPUT_PULLUP, 3) /* (T3) EXT_REFCLK1.I2C1_SDA */
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| D | k3-am654-base-board.dts | 87 AM65X_WKUP_IOPAD(0x0018, PIN_INPUT, 0) /* (T3) MCU_OSPI0_D3 */
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