Searched refs:TEGRA_CLK_RESET_BASE (Results 1 – 7 of 7) sorted by relevance
21 #define TEGRA_CLK_RESET_BASE 0x60006000 macro30 #define TEGRA_CLK_RST_DEVICES_L (TEGRA_CLK_RESET_BASE + 0x04)31 #define TEGRA_CLK_RST_DEVICES_H (TEGRA_CLK_RESET_BASE + 0x08)32 #define TEGRA_CLK_RST_DEVICES_U (TEGRA_CLK_RESET_BASE + 0x0c)33 #define TEGRA_CLK_OUT_ENB_L (TEGRA_CLK_RESET_BASE + 0x10)34 #define TEGRA_CLK_OUT_ENB_H (TEGRA_CLK_RESET_BASE + 0x14)35 #define TEGRA_CLK_OUT_ENB_U (TEGRA_CLK_RESET_BASE + 0x18)
251 mov32 r5, TEGRA_CLK_RESET_BASE321 mov32 r0, TEGRA_CLK_RESET_BASE553 .word TEGRA_CLK_RESET_BASE + CLK_RESET_CLK_SOURCE_MSELECT @0x18554 .word TEGRA_CLK_RESET_BASE + CLK_RESET_SCLK_BURST @0x1c564 .word TEGRA_CLK_RESET_BASE + CLK_RESET_CLK_SOURCE_MSELECT @0x18565 .word TEGRA_CLK_RESET_BASE + CLK_RESET_SCLK_BURST @0x1c580 .word TEGRA_CLK_RESET_BASE + CLK_RESET_CLK_SOURCE_MSELECT @0x18581 .word TEGRA_CLK_RESET_BASE + CLK_RESET_SCLK_BURST @0x1c
40 #define TEGRA_CLK_RESET_BASE 0x60006000 macro
16 #define TEGRA_CLK_RESET_VIRT (TEGRA_CLK_RESET_BASE - IO_PPSB_PHYS \
142 mov32 r5, TEGRA_CLK_RESET_BASE
171 mov32 r0, TEGRA_CLK_RESET_BASE363 mov32 r5, TEGRA_CLK_RESET_BASE
241 mov32 r7, TEGRA_CLK_RESET_BASE