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Searched refs:UTSR1_TBY (Results 1 – 2 of 2) sorted by relevance

/arch/arm/include/debug/
Dsa1100.S14 #define UTSR1_TBY 0x00000001 /* Transmitter BusY (read) */ macro
65 tst \rd, #UTSR1_TBY
/arch/arm/mach-sa1100/include/mach/
DSA-1100.h394 #define UTSR1_TBY 0x00000001 /* Transmitter BusY (read) */ macro