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Searched refs:V7M_SCB_ICIMVAU (Results 1 – 2 of 2) sorted by relevance

/arch/arm/include/asm/
Dv7m.h81 #define V7M_SCB_ICIMVAU 0x258 /* I-cache invalidate by MVA to PoU */ macro
/arch/arm/mm/
Dcache-v7m.S97 v7m_cacheop \rt, \tmp, V7M_SCB_ICIMVAU