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Searched refs:VAL (Results 1 – 8 of 8) sorted by relevance

/arch/arm64/kernel/
Dhw_breakpoint.c59 #define READ_WB_REG_CASE(OFF, N, REG, VAL) \ argument
61 AARCH64_DBG_READ(N, REG, VAL); \
64 #define WRITE_WB_REG_CASE(OFF, N, REG, VAL) \ argument
66 AARCH64_DBG_WRITE(N, REG, VAL); \
69 #define GEN_READ_WB_REG_CASES(OFF, REG, VAL) \ argument
70 READ_WB_REG_CASE(OFF, 0, REG, VAL); \
71 READ_WB_REG_CASE(OFF, 1, REG, VAL); \
72 READ_WB_REG_CASE(OFF, 2, REG, VAL); \
73 READ_WB_REG_CASE(OFF, 3, REG, VAL); \
74 READ_WB_REG_CASE(OFF, 4, REG, VAL); \
[all …]
/arch/arm/kernel/
Dhw_breakpoint.c48 #define READ_WB_REG_CASE(OP2, M, VAL) \ argument
50 ARM_DBG_READ(c0, c ## M, OP2, VAL); \
53 #define WRITE_WB_REG_CASE(OP2, M, VAL) \ argument
55 ARM_DBG_WRITE(c0, c ## M, OP2, VAL); \
58 #define GEN_READ_WB_REG_CASES(OP2, VAL) \ argument
59 READ_WB_REG_CASE(OP2, 0, VAL); \
60 READ_WB_REG_CASE(OP2, 1, VAL); \
61 READ_WB_REG_CASE(OP2, 2, VAL); \
62 READ_WB_REG_CASE(OP2, 3, VAL); \
63 READ_WB_REG_CASE(OP2, 4, VAL); \
[all …]
/arch/arm64/include/asm/
Dbarrier.h180 __unqual_scalar_typeof(*ptr) VAL; \
182 VAL = READ_ONCE(*__PTR); \
185 __cmpwait_relaxed(__PTR, VAL); \
187 (typeof(*ptr))VAL; \
193 __unqual_scalar_typeof(*ptr) VAL; \
195 VAL = smp_load_acquire(__PTR); \
198 __cmpwait_relaxed(__PTR, VAL); \
200 (typeof(*ptr))VAL; \
Dhw_breakpoint.h99 #define AARCH64_DBG_READ(N, REG, VAL) do {\ argument
100 VAL = read_sysreg(dbg##REG##N##_el1);\
103 #define AARCH64_DBG_WRITE(N, REG, VAL) do {\ argument
104 write_sysreg(VAL, dbg##REG##N##_el1);\
/arch/powerpc/include/asm/
Dbarrier.h88 __unqual_scalar_typeof(*ptr) VAL; \
89 VAL = READ_ONCE(*__PTR); \
93 VAL = READ_ONCE(*__PTR); \
97 (typeof(*ptr))VAL; \
/arch/arm/include/asm/
Dhw_breakpoint.h109 #define ARM_DBG_READ(N, M, OP2, VAL) do {\ argument
110 asm volatile("mrc p14, 0, %0, " #N "," #M ", " #OP2 : "=r" (VAL));\
113 #define ARM_DBG_WRITE(N, M, OP2, VAL) do {\ argument
114 asm volatile("mcr p14, 0, %0, " #N "," #M ", " #OP2 : : "r" (VAL));\
/arch/sparc/include/asm/
Dtsb.h113 #define TSB_STORE(ADDR, VAL) \ argument
114 661: stxa VAL, [ADDR] ASI_N; \
117 stxa VAL, [ADDR] ASI_PHYS_USE_EC; \
/arch/x86/kernel/
Dalternative.c1584 atomic_cond_read_acquire(&bp_desc.refs, !VAL); in text_poke_bp_batch()